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1.发明授权公开(公告)号：US07653824B2
公开(公告)日：2010-01-26
申请号：US11498920
申请日：2006-08-03
CPC分类号： G06F1/206
摘要： An information handling system is disclosed and can include at least one memory and at least two processor cores coupled thereto. Further, the information handling system can include a controller coupled to the at least two processor cores and the at least one memory. The controller can monitor the temperature within each processor core. Based on the temperature the controller can selectively steer one or more program threads away from an overheating processor core.
摘要翻译： 公开了一种信息处理系统，并且可以包括至少一个存储器和与其耦合的至少两个处理器核心。 此外，信息处理系统可以包括耦合到至少两个处理器核和至少一个存储器的控制器。 控制器可以监控每个处理器内核的温度。 基于温度，控制器可以选择性地将一个或多个程序线程远离过热处理器核心。
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2.发明申请公开(公告)号：US20080034232A1
公开(公告)日：2008-02-07
申请号：US11498920
申请日：2006-08-03
IPC分类号： G06F1/00
CPC分类号： G06F1/206
摘要： An information handling system is disclosed and can include at least one memory and at least two processor cores coupled thereto. Further, the information handling system can include a controller coupled to the at least two processor cores and the at least one memory. The controller can monitor the temperature within each processor core. Based on the temperature the controller can selectively steer one or more program threads away from an overheating processor core.
摘要翻译： 公开了一种信息处理系统，并且可以包括至少一个存储器和与其耦合的至少两个处理器核心。 此外，信息处理系统可以包括耦合到至少两个处理器核和至少一个存储器的控制器。 控制器可以监控每个处理器内核的温度。 基于温度，控制器可以选择性地将一个或多个程序线程远离过热处理器核心。
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公开(公告)号：US07603597B2
公开(公告)日：2009-10-13
申请号：US11300820
申请日：2005-12-15
IPC分类号： G11C29/00
CPC分类号： G06F11/1008 , G06F11/1076 , G11C29/832 , G11C2029/0411
摘要： In an information handling system, when a memory location is accessed and there is a bit error detected in that memory location then the memory location is logged into an error-log. The memory locations of the logged bit errors stored in the error-log are evaluated to determine whether there is one or more bit errors in a particular memory range, e.g., a contiguous range of memory locations. If there is one or more bit errors in a memory range, then that memory range may be hot ejected, e.g., disabled from use by the operating system. The bit error may be single bit error and/or multiple bit errors of a memory location.
摘要翻译： 在信息处理系统中，当访问存储器位置并且在该存储器位置中检测到位错误时，存储器位置被记录到错误日志中。 评估存储在错误日志中的记录位错误的存储器位置，以确定特定存储器范围（例如存储器位置的连续范围）中是否存在一个或多个位错误。 如果存储器范围中存在一个或多个位错误，则该存储器范围可以被热弹出，例如被操作系统使用禁止。 位错误可能是存储器位置的单位错误和/或多个位错误。
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4.发明授权Determination of a suitable target for an initiator by a control plane processor 有权通过控制平面处理器确定启动器的合适目标公开(公告)号：US09577953B2
公开(公告)日：2017-02-21
申请号：US14128453
申请日：2013-09-27
CPC分类号： H04L61/2015 , G06F9/00 , H04L41/00 , H04L49/00 , H04L67/1097 , H04L67/28
摘要： A first computational device receives a response generated by a second computational device for a third computational device. A target that is suitable for use by the third computational device is determined. The response is transmitted with an address of the target to the third computational device.
摘要翻译： 第一计算设备接收由第三计算设备的第二计算设备生成的响应。 确定适合于第三计算装置使用的目标。 将响应与目标的地址一起发送到第三计算设备。
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5.发明授权公开(公告)号：US08214541B2
公开(公告)日：2012-07-03
申请号：US11422771
申请日：2006-06-07
CPC分类号： G06F9/4411
摘要： A system for identifying peripheral devices in an information handling system uses a path-based signature for each peripheral component device. A static table is included for listing the path of each peripheral device and is accessible to the Basic Input-Output System (BIOS). The BIOS is configured to identify peripheral components associated and determine a path-base device signature for each peripheral component.
摘要翻译： 用于识别信息处理系统中的外围设备的系统使用每个外围组件设备的基于路径的签名。 包含静态表格列出每个外围设备的路径，并且可以访问基本输入输出系统（BIOS）。 BIOS被配置为识别相关联的外围组件，并确定每个外围组件的基于路径的设备签名。
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公开(公告)号：US08020165B2
公开(公告)日：2011-09-13
申请号：US11467600
申请日：2006-08-28
CPC分类号： G06F9/5016
摘要： In an information handling system, a plurality of system resources are usable by at least one processor. An affinity structure includes elements describing the relative accessibility of the plurality of system resources to the processor. An affinity manager adjusts the affinity structure in response to a least a first one of the plurality of system resources operating outside of at least one operating parameter.
摘要翻译： 在信息处理系统中，多个系统资源可由至少一个处理器使用。 亲和度结构包括描述多个系统资源对处理器的相对可访问性的元素。 亲和力管理器响应于在至少一个操作参数之外操作的多个系统资源中的至少第一个系统资源中的至少一个来调整亲和结构。
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公开(公告)号：US20100192029A1
公开(公告)日：2010-07-29
申请号：US12361814
申请日：2009-01-29
IPC分类号： G06F11/22
CPC分类号： G06F11/2284
摘要： In accordance with certain embodiments of the present disclosure, an information handling system is provided. The information handling system may include a plurality of processors, each processor comprising multiple cores, a memory system coupled to the plurality of processors, and a controller coupled to the plurality of processors. The controller may be configured to: receive a local system management interrupt (SMI) signal regarding an error associated with at least one of the multiple cores, determine that the received local SMI signal triggers a global SMI based on a global SMI trigger rule, cause the plurality of processors to enter a global system management mode (SMM), and log the error in a shared resource shared by the plurality of processors during the global SMM.
摘要翻译： 根据本公开的某些实施例，提供了一种信息处理系统。 信息处理系统可以包括多个处理器，每个处理器包括多个核心，耦合到多个处理器的存储器系统以及耦合到多个处理器的控制器。 控制器可以被配置为：接收关于与多个核心中的至少一个相关联的错误的本地系统管理中断（SMI）信号，确定接收到的本地SMI信号基于全局SMI触发规则触发全局SMI，导致 所述多个处理器进入全局系统管理模式（SMM），并且在所述全局SMM期间将所述错误记录在由所述多个处理器共享的共享资源中。
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公开(公告)号：US20090125695A1
公开(公告)日：2009-05-14
申请号：US12356259
申请日：2009-01-20
IPC分类号： G06F12/06
CPC分类号： G06F12/0223 , G06F1/206 , G06F12/0646
摘要： An information handling system includes a processor having access to a system memory. The system is operable to detect a thermal alert and identify an associated portion of system memory. The system may then modify memory allocation information used by an operating system to allocate system memory. When the thermal alert indicates a rising memory module temperature that exceeds a specified threshold, the modification of the memory allocation information causes the memory to appear to be more “distant” from the system processor(s) and thereby allocated less preferentially than other memory. If the temperature continues to rise beyond a higher threshold, a second modification of the memory allocation information is performed to simulate a “hot eject” of the memory module. As the memory module cools, the memory allocation information can be restored to simulate a hot add of the memory module and to restore the proximity of the memory module.
摘要翻译： 信息处理系统包括具有对系统存储器的访问的处理器。 该系统可操作以检测热警报并识别系统存储器的相关部分。 系统然后可以修改由操作系统使用的内存分配信息来分配系统存储器。 当热警报指示上升的存储器模块温度超过指定的阈值时，存储器分配信息的修改使得存储器看起来与系统处理器更“远”，从而比其他存储器更优先地分配。 如果温度继续上升超过更高的阈值，则执行存储器分配信息的第二修改以模拟存储器模块的“热喷射”。 当存储器模块冷却时，可以恢复存储器分配信息以模拟存储器模块的热添加并恢复存储器模块的接近。
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9.发明申请System and method for managing system management interrupts in a multiprocessor computer system 审中-公开用于管理多处理器计算机系统中的系统管理中断的系统和方法公开(公告)号：US20080082710A1
公开(公告)日：2008-04-03
申请号：US11540804
申请日：2006-09-29
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F9/4812
摘要： A system and method is disclosed in which, during the execution of an interrupt handling sequence in one of the processor of a multiprocessor system, a processors write a reason code to a status register to identify the cause of the interrupt. The BIOS code of the system writes to an interrupt initiation register to cause each of the processors to enter an interrupt handling sequence. Each of the processors of the system handling the interrupt on the basis of the content of the status register, resulting in each of the processors synchronously handling an interrupt for an event that would otherwise result in a local interrupt.
摘要翻译： 公开了一种系统和方法，其中在多处理器系统的处理器之一执行中断处理序列期间，处理器将原因代码写入状态寄存器以识别中断的原因。 系统的BIOS代码写入中断启动寄存器，使每个处理器进入中断处理程序。 基于状态寄存器的内容处理中断的系统的每个处理器，导致每个处理器同步处理否则将导致本地中断的事件的中断。
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10.发明授权System and method for manufacture of information handling systems with selective option ROM executions 有权使用选择性ROM执行的信息处理系统的制造和制造方法公开(公告)号：US07127603B2
公开(公告)日：2006-10-24
申请号：US10713930
申请日：2003-11-14
CPC分类号： G06F9/4401
摘要： Option ROMs associated with information handling system processing components is selectively disabled to reduce the time associated with one or more boots of the information handling system, such as during deployment of applications after manufacture of the information handling system. An Option ROM selector module identifies one or more Option ROMs to disable at a boot, such as Option ROMs associated with processing components that are not needed for deployment of applications, and communicates the disabled Option ROMs to an Option ROM boot execution controller of the information handling system, such as with SMBIOS tokens. At a subsequent boot, the Option ROM execution controller prevents the BIOS from loading disabled Option ROMs for execution so that boot time is reduced with impact to the deployment of applications.
摘要翻译： 与信息处理系统处理组件相关联的选项ROM被选择性地禁用，以减少与信息处理系统的一个或多个引导相关联的时间，诸如在信息处理系统的制造之后部署应用期间。 选件ROM选择器模块识别在启动时禁用的一个或多个选项ROM，例如与处理部署应用程序不需要的组件相关联的选项ROM，并将禁用的选项ROM传送到信息的选件ROM引导执行控制器 处理系统，如使用SMBIOS令牌。 在随后的引导过程中，Option ROM执行控制器可防止BIOS加载禁用的选项ROM以进行执行，从而降低启动时间，同时影响应用程序的部署。
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