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公开(公告)号：US09018082B2
公开(公告)日：2015-04-28
申请号：US13555252
申请日：2012-07-23
摘要： A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.
摘要翻译： 提供了一种在用于半导体器件应用的半导体衬底的表面上制造模板化半导体纳米线的方法。 该方法包括通过使用氧反应种子材料来控制半导体纳米线的空间位置。 本发明还提供包括半导体纳米线的半导体结构。 在又一个实施例中，提供了在随后的退火步骤期间能够与氧反应元件形成化合物半导体合金的化合物半导体衬底或其它类似衬底的图案化。 该实施例提供可用于各种应用的图案化衬底，包括例如半导体器件制造，光电器件制造和太阳能电池器件制造。
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公开(公告)号：US09082687B2
公开(公告)日：2015-07-14
申请号：US13555242
申请日：2012-07-23
摘要： A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.
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公开(公告)号：US08349715B2
公开(公告)日：2013-01-08
申请号：US12696417
申请日：2010-01-29
IPC分类号： H01L21/20
摘要： A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.
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公开(公告)号：US20120286235A1
公开(公告)日：2012-11-15
申请号：US13555242
申请日：2012-07-23
IPC分类号： H01L21/20 , H01L29/66 , H01L21/306 , B82Y40/00
摘要： A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.
摘要翻译： 提供了一种在用于半导体器件应用的半导体衬底的表面上制造模板化半导体纳米线的方法。 该方法包括通过使用氧反应种子材料来控制半导体纳米线的空间位置。 本发明还提供包括半导体纳米线的半导体结构。 在又一个实施例中，提供了在随后的退火步骤期间能够与氧反应元件形成化合物半导体合金的化合物半导体衬底或其它类似衬底的图案化。 该实施例提供可用于各种应用的图案化衬底，包括例如半导体器件制造，光电器件制造和太阳能电池器件制造。
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公开(公告)号：US20110186804A1
公开(公告)日：2011-08-04
申请号：US12696417
申请日：2010-01-29
摘要： A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.
摘要翻译： 提供了一种在用于半导体器件应用的半导体衬底的表面上制造模板化半导体纳米线的方法。 该方法包括通过使用氧反应种子材料来控制半导体纳米线的空间位置。 本发明还提供包括半导体纳米线的半导体结构。 在又一个实施例中，提供了在随后的退火步骤期间能够与氧反应元件形成化合物半导体合金的化合物半导体衬底或其它类似衬底的图案化。 该实施例提供可用于各种应用的图案化衬底，包括例如半导体器件制造，光电器件制造和太阳能电池器件制造。
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公开(公告)号：US20120289035A1
公开(公告)日：2012-11-15
申请号：US13555252
申请日：2012-07-23
IPC分类号： H01L21/20
摘要： A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.
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公开(公告)号：US20120309269A1
公开(公告)日：2012-12-06
申请号：US13150813
申请日：2011-06-01
申请人： Maha M. Khayyat , Norma E. Sosa Cortes , Katherine L. Saenger , Stephen W. Bedell , Devendra K. Sadana
发明人： Maha M. Khayyat , Norma E. Sosa Cortes , Katherine L. Saenger , Stephen W. Bedell , Devendra K. Sadana
IPC分类号： B24B1/00
CPC分类号： H01L21/187
摘要： Method to (i) introduce additional control into a material spalling process, thus improving both the crack initiation and propagation, and (ii) increase the range of selectable spalling depths are provided. In one embodiment, the method includes providing a stressor layer on a surface of a base substrate at a first temperature which is room temperature. Next, the base substrate including the stressor layer is brought to a second temperature which is less than room temperature. The base substrate is spalled at the second temperature to form a spalled material layer. Thereafter, the spalled material layer is returned to room temperature, i.e., the first temperature.
摘要翻译： 方法：（i）对材料剥落过程引入额外的控制，从而改善裂纹的产生和传播，并提供（ii）提高选择性剥落深度的范围。 在一个实施例中，该方法包括在室温下的第一温度下在基底基板的表面上提供应力层。 接下来，包括应力层的基底衬底达到小于室温的第二温度。 基底基板在第二温度下剥离以形成剥离的材料层。 此后，剥离的材料层返回到室温，即第一温度。
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公开(公告)号：US20130269860A1
公开(公告)日：2013-10-17
申请号：US13448939
申请日：2012-04-17
申请人： Maha M. Khayyat , Norma E. Sosa Cortes , Stephen W. Bedell , Keith E. Fogel , Devendra K. Sadana
发明人： Maha M. Khayyat , Norma E. Sosa Cortes , Stephen W. Bedell , Keith E. Fogel , Devendra K. Sadana
CPC分类号： B32B38/10 , B32B2457/14 , H01L21/02002 , H01L21/304 , H01L21/6836 , H01L31/1892 , Y02E10/50
摘要： A stressor layer is formed atop a base substrate at a first temperature which induces a first tensile stress in the base substrate that is below a fracture toughness of base substrate. The base substrate and the stressor layer are then brought to a second temperature which is less than the first temperature. The second temperature induces a second tensile stress in the stressor layer which is greater than the first tensile stress and which is sufficient to allow for spalling mode fracture to occur within the base substrate. The base substrate is spalled at the second temperature to form a spalled material layer. Spalling occurs at a fracture depth which is dependent upon the fracture toughness of the base substrate, stress level within the base substrate, and the second tensile stress of the stressor layer induced at the second temperature.
摘要翻译： 在第一温度下在基底顶部形成应力层，该第一温度在基础基板中引起低于基底基板的断裂韧性的第一拉伸应力。 然后使基底和应力层达到小于第一温度的第二温度。 第二温度在应力层中引起第二拉伸应力，其大于第一拉伸应力，并且其足以允许在基底基底内发生剥落模式断裂。 基底基板在第二温度下剥离以形成剥离的材料层。 剥离发生在取决于基底的断裂韧性，基底衬底内的应力水平以及在第二温度下引起的应力层的第二拉伸应力的断裂深度。
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公开(公告)号：US10396229B2
公开(公告)日：2019-08-27
申请号：US13103583
申请日：2011-05-09
申请人： Joel P. De Souza , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Christian Lavoie , Devendra K. Sadana , Katherine L. Saenger , Davood Shahrjerdi , Zhen Zhang
发明人： Joel P. De Souza , Harold J. Hovel , Daniel A. Inns , Jeehwan Kim , Christian Lavoie , Devendra K. Sadana , Katherine L. Saenger , Davood Shahrjerdi , Zhen Zhang
IPC分类号： H01L31/07 , H01L31/0224 , H01L31/18 , H01L31/068
摘要： A solar cell having n-type and p-type interdigitated back contacts (IBCs), which cover the entire back surface of the absorber layer. The spatial separation of the IBCs is in a direction perpendicular to the back surface, thus providing borderless contacts having a zero-footprint separation. As the contacts are on the back, photons incident on the cell's front surface can be absorbed without any shadowing.
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公开(公告)号：US09331220B2
公开(公告)日：2016-05-03
申请号：US13173097
申请日：2011-06-30
IPC分类号： H01L31/0236 , H01L31/0352 , H01L31/02 , H01L31/075 , H01L31/18 , H01L31/0224
CPC分类号： H01L31/02366 , H01L31/022483 , H01L31/02363 , H01L31/035281 , H01L31/03529 , H01L31/03762 , H01L31/075 , H01L31/077 , H01L31/1804 , H01L31/1888 , Y02E10/50
摘要： A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and forming a continuous photovoltaic stack including an N-type layer, a P-type layer and an intrinsic layer on the first electrode. A second electrode layer is deposited over the photovoltaic stack such that gaps or fissures occur in the second electrode layer between the pillar structures. The second electrode layer is wet etched to open up the gaps or fissures and reduce the second electrode layer to form a three-dimensional electrode of substantially uniform thickness over the photovoltaic stack.
摘要翻译： 一种光电器件和方法包括在衬底中形成多个柱结构，在柱结构上形成第一电极层，并在第一衬底上形成包括N型层，P型层和本征层的连续光伏堆叠 电极。 第二电极层沉积在光伏堆叠上，使得在柱结构之间的第二电极层中出现间隙或裂缝。 湿蚀刻第二电极层以打开间隙或裂缝并且减小第二电极层以在光伏堆叠上形成基本上均匀厚度的三维电极。
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