公开(公告)号：US20100117135A1

公开(公告)日：2010-05-13

申请号：US12564349

申请日：2009-09-22

申请人： Makoto MIZUKAMI ,  Kiyohito Nishihara ,  Masaki Kondo ,  Takashi Izumida ,  Hirokazu Ishida ,  Atsushi Fukumoto ,  Fumiki Aiso ,  Daigo Ichinose ,  Tadashi Iguchi

发明人： Makoto MIZUKAMI ,  Kiyohito Nishihara ,  Masaki Kondo ,  Takashi Izumida ,  Hirokazu Ishida ,  Atsushi Fukumoto ,  Fumiki Aiso ,  Daigo Ichinose ,  Tadashi Iguchi

IPC分类号： H01L27/12 ,  H01L21/86

CPC分类号： H01L27/1203 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11524

摘要： A semiconductor device is formed on a SOI substrate having a semiconductor substrate, a buried oxide film formed on the semiconductor substrate, and a semiconductor layer formed on the buried oxide film, the semiconductor substrate having a first conductive type, the semiconductor layer having a second conductive type, wherein the buried oxide film has a first opening opened therethrough for communicating the semiconductor substrate with the semiconductor layer, the semiconductor layer is arranged to have a first buried portion buried in the first opening in contact with the semiconductor substrate and a semiconductor layer main portion positioned on the first buried portion and on the buried oxide film, the semiconductor substrate has a connection layer buried in a surface of the semiconductor substrate and electrically connected to the first buried portion in the first opening, the connection layer having the second conductive type, and the semiconductor device includes a contact electrode buried in a second opening, a side surface of the contact electrode being connected to the semiconductor layer main portion, a bottom surface of the contact electrode being connected to the connection layer, the second opening passing through the semiconductor layer main portion and the buried oxide film, and the second opening reaching a surface portion of the connection layer.

摘要翻译： 半导体器件形成在具有半导体衬底的SOI衬底上，形成在半导体衬底上的掩埋氧化膜以及形成在掩埋氧化膜上的半导体层，该半导体衬底具有第一导电类型，该半导体层具有第二导电型 导电型，其中所述掩埋氧化物膜具有通过其开口的第一开口，用于使所述半导体衬底与所述半导体层连通，所述半导体层被布置为具有埋在所述第一开口中的与所述半导体衬底接触的第一掩埋部分和半导体层 主要部分位于第一掩埋部分和掩埋氧化膜上，半导体衬底具有埋在半导体衬底的表面中并与第一开口中的第一掩埋部分电连接的连接层，连接层具有第二导电 类型，并且半导体器件包括接触电极 阴极埋入第二开口中，接触电极的侧表面连接到半导体层主体部分，接触电极的底表面连接到连接层，第二开口穿过半导体层主体部分和埋设 氧化膜，第二开口到达连接层的表面部分。

公开(公告)号：US07986000B2

公开(公告)日：2011-07-26

申请号：US12564349

申请日：2009-09-22

申请人： Makoto Mizukami ,  Kiyohito Nishihara ,  Masaki Kondo ,  Takashi Izumida ,  Hirokazu Ishida ,  Atsushi Fukumoto ,  Fumiki Aiso ,  Daigo Ichinose ,  Tadashi Iguchi

发明人： Makoto Mizukami ,  Kiyohito Nishihara ,  Masaki Kondo ,  Takashi Izumida ,  Hirokazu Ishida ,  Atsushi Fukumoto ,  Fumiki Aiso ,  Daigo Ichinose ,  Tadashi Iguchi

IPC分类号： H01L29/76 ,  H01L21/00 ,  H01L21/84

CPC分类号： H01L27/1203 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11524

摘要： A semiconductor device is formed on a SOI substrate having a semiconductor substrate, a buried oxide film formed on the semiconductor substrate, and a semiconductor layer formed on the buried oxide film, the semiconductor substrate having a first conductive type, the semiconductor layer having a second conductive type, wherein the buried oxide film has a first opening opened therethrough for communicating the semiconductor substrate with the semiconductor layer, the semiconductor layer is arranged to have a first buried portion buried in the first opening in contact with the semiconductor substrate and a semiconductor layer main portion positioned on the first buried portion and on the buried oxide film, the semiconductor substrate has a connection layer buried in a surface of the semiconductor substrate and electrically connected to the first buried portion in the first opening, the connection layer having the second conductive type, and the semiconductor device includes a contact electrode buried in a second opening, a side surface of the contact electrode being connected to the semiconductor layer main portion, a bottom surface of the contact electrode being connected to the connection layer, the second opening passing through the semiconductor layer main portion and the buried oxide film, and the second opening reaching a surface portion of the connection layer.

摘要翻译： 半导体器件形成在具有半导体衬底的SOI衬底上，形成在半导体衬底上的掩埋氧化膜以及形成在掩埋氧化膜上的半导体层，该半导体衬底具有第一导电类型，该半导体层具有第二导电型 导电型，其中所述掩埋氧化物膜具有通过其开口的第一开口，用于使所述半导体衬底与所述半导体层连通，所述半导体层被布置为具有埋在所述第一开口中的与所述半导体衬底接触的第一掩埋部分和半导体层 主要部分位于第一掩埋部分和掩埋氧化膜上，半导体衬底具有埋在半导体衬底的表面中并与第一开口中的第一掩埋部分电连接的连接层，连接层具有第二导电 类型，并且半导体器件包括接触电极 阴极埋入第二开口中，接触电极的侧表面连接到半导体层主体部分，接触电极的底表面连接到连接层，第二开口穿过半导体层主体部分和埋设 氧化膜，第二开口到达连接层的表面部分。

公开(公告)号：US20090286401A1

公开(公告)日：2009-11-19

申请号：US12411788

申请日：2009-03-26

申请人： Daigo Ichinose ,  Tadashi Iguchi

发明人： Daigo Ichinose ,  Tadashi Iguchi

IPC分类号： H01L21/302

CPC分类号： H01L21/0337 ,  H01L21/0338

摘要： A method of fabricating a semiconductor device according to one embodiment includes: forming a core material on a workpiece; forming a coating film comprising an amorphous material so as to cover an upper surface and side faces of the core material; crystallizing the coating film by applying heat treatment; forming a sidewall mask by removing the crystallized coating film while leaving a portion thereof located on the side faces of the core material; removing the core material after forming the sidewall mask; and etching the workpiece using the sidewall mask as a mask after removing the core material.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：在工件上形成芯材; 形成包含非晶材料以覆盖芯材的上表面和侧面的涂膜; 通过施加热处理使涂膜结晶; 通过除去结晶的涂膜，同时留下其位于芯材的侧面的部分来形成侧壁罩; 在形成侧壁罩之后去除芯材; 并且在去除芯材之后，使用侧壁掩模作为掩模蚀刻工件。

公开(公告)号：US08062980B2

公开(公告)日：2011-11-22

申请号：US12411788

申请日：2009-03-26

申请人： Daigo Ichinose ,  Tadashi Iguchi

发明人： Daigo Ichinose ,  Tadashi Iguchi

IPC分类号： C03C15/00 ,  C03C25/68 ,  C23F1/00 ,  H01L21/311 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L21/0337 ,  H01L21/0338

摘要： A method of fabricating a semiconductor device according to one embodiment includes: forming a core material on a workpiece; forming a coating film comprising an amorphous material so as to cover an upper surface and side faces of the core material; crystallizing the coating film by applying heat treatment; forming a sidewall mask by removing the crystallized coating film while leaving a portion thereof located on the side faces of the core material; removing the core material after forming the sidewall mask; and etching the workpiece using the sidewall mask as a mask after removing the core material.

摘要翻译： 根据一个实施例的制造半导体器件的方法包括：在工件上形成芯材; 形成包含非晶材料以覆盖芯材的上表面和侧面的涂膜; 通过施加热处理使涂膜结晶; 通过除去结晶的涂膜，同时留下其位于芯材的侧面的部分来形成侧壁罩; 在形成侧壁罩之后去除芯材; 并且在去除芯材之后，使用侧壁掩模作为掩模蚀刻工件。

公开(公告)号：US08436416B2

公开(公告)日：2013-05-07

申请号：US12839784

申请日：2010-07-20

申请人： Daigo Ichinose ,  Tadashi Iguchi

发明人： Daigo Ichinose ,  Tadashi Iguchi

IPC分类号： H01L27/115 ,  H01L21/8246

CPC分类号： H01L27/11578 ,  H01L27/11575 ,  H01L27/11582

摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a substrate, a stacked body, a plurality of semiconductor pillars and a charge storage film. The stacked body is provided on the substrate, with a plurality of insulating films alternately stacked with a plurality of electrode films, and includes a hydrophobic layer provided between one of the insulating films and one of the electrode films. The hydrophobic layer has higher hydrophobicity than the electrode films. The plurality of semiconductor pillars extend in a stacking direction of the stacked body and pierce the stacked body, and the charge storage film is provided between the electrode films and one of the semiconductor pillars.

摘要翻译： 根据一个实施例，非易失性半导体存储器件包括衬底，层叠体，多个半导体柱和电荷存储膜。 层叠体设置在基板上，多个绝缘膜交替地堆叠有多个电极膜，并且包括设置在绝缘膜之一和一个电极膜之间的疏水层。 疏水层具有比电极膜更高的疏水性。 多个半导体柱沿堆叠体的堆叠方向延伸并刺穿层叠体，并且电荷存储膜设置在电极膜和一个半导体柱之间。

公开(公告)号：US08791524B2

公开(公告)日：2014-07-29

申请号：US13422068

申请日：2012-03-16

申请人： Daigo Ichinose ,  Hanae Ishihara

发明人： Daigo Ichinose ,  Hanae Ishihara

IPC分类号： H01L29/72 ,  H01L21/336

CPC分类号： H01L29/7926 ,  H01L27/11582

摘要： According to one embodiment, a method is disclosed for manufacturing a nonvolatile semiconductor memory device. The method can includes forming a semiconductor layer containing an impurity and forming a pattern on the semiconductor layer. The method can include forming first insulating layers in a stripe shape from a surface of the semiconductor layer toward an inside and forming a first insulating film on the semiconductor layer and on the first insulating layers to form a stacked body including electrode layers on the first insulating film. The method can include forming a pair of holes in the stacked body and forming a space portion connected to a lower end of the holes. The method can include forming a memory film on a side wall of the holes. In addition, the method can include forming a channel body layer on a surface of the memory film.

摘要翻译： 根据一个实施例，公开了用于制造非易失性半导体存储器件的方法。 该方法可以包括在半导体层上形成含有杂质并形成图案的半导体层。 该方法可以包括从半导体层的表面向内部形成带状的第一绝缘层，并在半导体层和第一绝缘层上形成第一绝缘膜，以在第一绝缘层上形成包括电极层的层叠体 电影。 该方法可以包括在层叠体中形成一对孔并形成连接到孔的下端的空间部分。 该方法可包括在孔的侧壁上形成记忆膜。 此外，该方法可以包括在存储膜的表面上形成通道体层。

公开(公告)号：US08723247B2

公开(公告)日：2014-05-13

申请号：US13218972

申请日：2011-08-26

申请人： Yosuke Komori ,  Daigo Ichinose

发明人： Yosuke Komori ,  Daigo Ichinose

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/7926 ,  H01L27/11582

摘要： According to one embodiment, a semiconductor memory device includes a plurality of gate electrode films arranged parallel to each other along a direction, a semiconductor member extending in the direction, and passing through the plurality of gate electrode films, and a charge storage film provided between the gate electrode films and the semiconductor member. Protrusions are provided projecting along the direction at the ends of the gate electrode films in opposition to the semiconductor member. A gaseous layer is formed in a part of a gap between the gate electrode films.

摘要翻译： 根据一个实施例，半导体存储器件包括沿着方向彼此平行布置的多个栅极电极膜，沿该方向延伸的半导体部件，并且穿过多个栅极电极膜;以及电荷存储膜， 栅极电极膜和半导体部件。 沿着与半导体部件相对的栅极电极膜的端部的方向突出设置突起。 在栅电极膜之间的间隙的一部分中形成气体层。

公开(公告)号：US08692311B2

公开(公告)日：2014-04-08

申请号：US13236716

申请日：2011-09-20

申请人： Hiroshi Shinohara ,  Daigo Ichinose

发明人： Hiroshi Shinohara ,  Daigo Ichinose

IPC分类号： H01L29/792

CPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L29/7926

摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include selectively implanting an impurity into a underlying layer containing silicon using a mask to form a boron-added region and an etched region. The boron-added region contains boron, and a boron concentration of the etched region is lower than a boron concentration in the boron added region. The method can include forming a pair of holes reaching the etched region in the stacked body including a plurality of layers of electrode layers. The method can include forming a depression part connected to a lower end of each of the pair of holes in the underlying layer by removing the etched region through the holes using an etching solution.

摘要翻译： 根据一个实施例，公开了一种用于制造半导体器件的方法。 该方法可以包括使用掩模来选择性地将杂质注入含硅的下层中以形成加硼区域和蚀刻区域。 硼添加区域含有硼，蚀刻区域的硼浓度低于硼添加区域的硼浓度。 该方法可以包括在包括多层电极层的层叠体中形成到达蚀刻区域的一对孔。 该方法可以包括通过使用蚀刻溶液去除通过孔的蚀刻区域来形成连接到下层中的一对孔中的每一个的下端的凹陷部分。

公开(公告)号：US20120244673A1

公开(公告)日：2012-09-27

申请号：US13236716

申请日：2011-09-20

申请人： Hiroshi SHINOHARA ,  Daigo Ichinose

发明人： Hiroshi SHINOHARA ,  Daigo Ichinose

IPC分类号： H01L21/336

CPC分类号： H01L27/11582 ,  H01L27/1157 ,  H01L29/7926

摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method can include selectively implanting an impurity into a underlying layer containing silicon using a mask to form a boron-added region and an etched region. The boron-added region contains boron, and a boron concentration of the etched region is lower than a boron concentration in the boron added region. The method can include forming a pair of holes reaching the etched region in the stacked body including a plurality of layers of electrode layers. The method can include forming a depression part connected to a lower end of each of the pair of holes in the underlying layer by removing the etched region through the holes using an etching solution.

摘要翻译： 根据一个实施例，公开了一种用于制造半导体器件的方法。 该方法可以包括使用掩模来选择性地将杂质注入含硅的下层中以形成加硼区域和蚀刻区域。 硼添加区域含有硼，蚀刻区域的硼浓度低于硼添加区域的硼浓度。 该方法可以包括在包括多层电极层的层叠体中形成到达蚀刻区域的一对孔。 该方法可以包括通过使用蚀刻溶液去除通过孔的蚀刻区域来形成连接到下面的一对孔中的每一个的下端的凹陷部分。