摘要:
A lithographic structure consisting essentially of: an organic antireflective material disposed on a substrate; a vapor-deposited RCHX material, wherein R is one or more elements selected from the group consisting of Si, Ge, B, Sn, Fe and Ti, and wherein X is not present or is one or more elements selected from the group consisting of O, N, S and F; and a photoresist material disposed on the RCHX material. The invention is also directed to methods of making the lithographic structure, and using the structure to pattern a substrate.
摘要:
A hardness tester having a frame and a rotatable turret movably supported on the frame is provided. A plurality of load cells are fixedly mountable on the turret, and a plurality of indenters are fixedly attachable to the load cells, respectively. A user interface selectively provides signals to a motor to move the turret into contact with a test specimen via one of the indenters to thereby apply a load on the test specimen. The indenters are fixed with respect to the turret and do not move in relation to the turret when the turret is brought down to bear on the test specimen. The load cells measure the load applied to the test specimen. A closed loop control system receives load measurement signals from the load cells and controls movement of the turret, preventing the motor from applying load in excess of a predetermined selectable load amount input by a user via the user interface. The invention preferably includes a plurality of indenter adapters, each attached to respective undersides of the load cells. Each indenter adapter includes a slot into which the indenter is fittable, and least one set screw for adjusting a horizontal location of the indenter.
摘要:
A hardness tester is disclosed which conducts its hardness test through a penetrator impinging upon the surface of a test specimen. Enhanced accuracy and repeatability is achieved through the use of a closed loop system and directly mounting a load cell to the indentor, connecting a linear displacement transducer directly to the load cell and eliminating an elevating screw in initially positioning and applying load to the specimen to be tested.
摘要:
A device for measuring both the phase change temperature of a sample of a molten metal bath and the actual bath temperature by means of a single thermocouple. The device having a chamber defined by a housing such that the housing will be consumed by the molten metal bath after determination of the phase change temperature of the sample within the chamber. After consumption of the housing, the sample remelts into the bath and the thermocouple determines the bath temperature.
摘要:
A method for protecting a semiconductor device from carbon depletion type damage includes enriching an exposed surface of a porous interlevel dielectric material (ILD) with a carbon based material, and implementing a plasma based operation on the porous ILD material. The enriching of the porous ILD material reduces effects of carbon depletion as a result of the plasma based operation.
摘要:
Titanium and/or tantalum nitrides or nitride silicides are deposited onto a substrate by chemical vapor deposition of a titanium and/or tantalum silylamido complex.
摘要:
A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride layer is deposited using a high-density plasma (HDP) process, wherein the substrate is disposed on an electrode to which a bias power in the range of about 50 W to about 500 W is supplied. The bias power is characterized as high-frequency power (supplied by an RF generator at 13.56 MHz). The FET device may also include NFET gate structures. A blocking layer is deposited over the NFET gate structures so that the nitride layer overlies the blocking layer; after the blocking layer is removed, the nitride layer is not in contact with the NFET gate structures. The nitride layer has a thickness in the range of about 300-2000 Å.
摘要:
A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride layer is deposited using a high-density plasma (HDP) process, wherein the substrate is disposed on an electrode to which a bias power in the range of about 50 W to about 500 W is supplied. The bias power is characterized as high-frequency power (supplied by an RF generator at 13.56 MHz). The FET device may also include NFET gate structures. A blocking layer is deposited over the NFET gate structures so that the nitride layer overlies the blocking layer; after the blocking layer is removed, the nitride layer is not in contact with the NFET gate structures. The nitride layer has a thickness in the range of about 300-2000 Å.
摘要:
The present invention relates to a bilayer cap structure for interconnect structures that comprise copper metallization or other conductive metallization. Such bilayer cap structure includes a first cap layer formed by an unbiased high density plasma (HDP) chemical vapor deposition process, and a second cap layer over the first cap layer, where the second cap layer is formed by a biased high density plasma (bHDP) chemical vapor deposition process. During the bHDP chemical vapor deposition process, a low AC bias power is applied to the substrate to increase the ion bombardment on the substrate surface and to induce resputtering of the capping material, thereby forming a seamless second cap layer with excellent reactive ion etching (RIE) selectivity.
摘要:
A cap nitride stack which prevents etch penetration to the HDP nitride while maintaining the electromigration benefits of HDP nitride atop Cu. In one embodiment, the stack comprises a first layer of HDP nitride and a second layer of a Si—C—H compound disposed over the first layer. The Si—C—H compound is for example BLoK, or N-BLoK (Si—C—H—N), and is selected from a group of materials that has high selectivity during via RIE such that RIE chemistry from the next wiring level does not punch through. Carbon and nitrogen are the key elements. In another embodiment, the stack comprises a first layer of HDP nitride, followed by a second layer of UVN (a plasma nitride), and a third layer comprising HDP nitride disposed over the second layer.