利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

98 条记录 (耗时 0.046 秒)

    Memory controller, data storage device, and memory controlling method
    4.
    发明授权
    Memory controller, data storage device, and memory controlling method 有权
    内存控制器，数据存储设备和内存控制方式

    公开(公告)号：US09191030B2

    公开(公告)日：2015-11-17

    申请号：US13693360

    申请日：2012-12-04

    申请人： Akihiro Sakata ,  Yoshinobu Kimura

    发明人： Akihiro Sakata ,  Yoshinobu Kimura

    IPC分类号： H03M13/29 ,  G06F11/10

    CPC分类号： H03M13/29 ,  G06F11/1004 ,  H03M13/2906

    摘要： A memory controller includes a first error detection code generator for generating a first error detection code for data received from a host, a controller to write the data and the first error detection code to nonvolatile memory and to read the data and the first error detection code from the nonvolatile memory, an error detector to perform an error detection based on the data and the first error detection code that are read from the nonvolatile memory, a second error detection code generator to generate a second detection error code based on the data read from the nonvolatile memory, and a mismatch code generator to generate a mismatch code signaling the presence of an error in the data, wherein either the second error detection code or the mismatch code is selected based on the error detection and sent to the host.

    摘要翻译： 存储器控制器包括：第一错误检测码发生器，用于产生用于从主机接收的数据的第一错误检测码，控制器将数据和第一错误检测码写入非易失性存储器，并读取数据和第一错误检测码 来自所述非易失性存储器的误差检测器，基于从所述非易失性存储器读取的所述数据和所述第一检错码执行错误检测;第二检错码发生器，用于基于从所述非易失性存储器读取的数据产生第二检测错误代码; 所述非易失性存储器和不匹配码发生器产生用于发信号通知所述数据中存在错误的不匹配码，其中所述第二错误检测码或所述不匹配码是基于所述错误检测被选择的并被发送给所述主机。

    Semiconductor device and manufacturing method of the same
    8.
    发明申请
    Semiconductor device and manufacturing method of the same 失效
    半导体器件及其制造方法相同

    公开(公告)号：US20060073664A1

    公开(公告)日：2006-04-06

    申请号：US11242961

    申请日：2005-10-05

    申请人： Masao Kondo ,  Nobuyuki Sugii ,  Yoshinobu Kimura

    发明人： Masao Kondo ,  Nobuyuki Sugii ,  Yoshinobu Kimura

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7835 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/6659 ,  H01L29/66659

    摘要： Provided is a technology capable of suppressing a reduction in electron mobility in a channel region formed in a strained silicon layer. A p type strained silicon layer is formed over a p type silicon-germanium layer formed over a semiconductor substrate. The p type strained layer has a thickness adjusted to be thicker than the critical film thickness at which no misfit dislocation occurs. Accordingly, misfit dislocations occur in the vicinity of the interface between the p type strained silicon layer and p type silicon-germanium layer. At a position which is below the end of a gate electrode and at which misfit dislocations occur, the impurity concentration of the n type strained silicon layer and n type silicon-germanium layer is 1×1019 cm−3 or less.

    摘要翻译： 提供了能够抑制形成在应变硅层中的沟道区域中的电子迁移率降低的技术。 在半导体衬底上形成的p型硅 - 锗层上形成p型应变硅层。 p型应变层的厚度被调整为比没有失配位错发生的临界膜厚度更厚。 因此，在p型应变硅层和p型硅 - 锗层之间的界面附近发生失配位错。 在位于栅电极末端并发生失配位错的位置处，n型应变硅层和n型硅 - 锗层的杂质浓度为1×10 19 cm -3， -3以下。

    Method and apparatus forming crystallized semiconductor layer, and method for manufacturing semiconductor apparatus
    9.
    发明申请
    Method and apparatus forming crystallized semiconductor layer, and method for manufacturing semiconductor apparatus 审中-公开
    形成结晶半导体层的方法和装置以及半导体装置的制造方法

    公开(公告)号：US20060040436A1

    公开(公告)日：2006-02-23

    申请号：US11203962

    申请日：2005-08-16

    申请人： Yoshitaka Yamamoto ,  Mikihiko Nishitani ,  Masato Hiramatsu ,  Masayuki Jyumonji ,  Yoshinobu Kimura

    发明人： Yoshitaka Yamamoto ,  Mikihiko Nishitani ,  Masato Hiramatsu ,  Masayuki Jyumonji ,  Yoshinobu Kimura

    IPC分类号： H01L21/84

    CPC分类号： H01L21/02686 ,  H01L21/2026 ,  H01L29/66772

    摘要： A method for forming a crystallized semiconductor layer includes preparing a non-single-crystal semiconductor layer in which at least one crystal seed is formed, and irradiating with an energy ray the non-single-crystal semiconductor layer having the crystal seed formed therein to allow a crystal to laterally grow from the crystal seed in the non-single-crystal semiconductor layer, irradiation of the energy ray is carried out by positioning to at least a part of the crystal seed an area having a minimum intensity value of the energy ray, the energy ray having a confirmation that an area having a maximum intensity value of the energy ray is continuously reduced to the area having the minimum intensity value in an irradiated surface.

    摘要翻译： 一种形成结晶化半导体层的方法包括制备其中形成至少一个晶种的非单晶半导体层，并且用能量线照射其中形成晶种的非单晶半导体层以允许 在非单晶半导体层中从晶种横向生长的晶体，通过将至少一部分晶种定位到晶种的至少一部分，进行能量射线的最小强度值的区域的照射， 能量射线确认具有能量射线的最大强度值的区域连续地减少到照射表面中具有最小强度值的区域。