公开(公告)号：US5187561A

公开(公告)日：1993-02-16

申请号：US545870

申请日：1990-06-29

申请人： Masahiko Hasunuma ,  Hisashi Kaneko ,  Atsuhito Sawabe ,  Takashi Kawanoue ,  Yoshiko Kohanawa ,  Shuichi Komatsu

发明人： Masahiko Hasunuma ,  Hisashi Kaneko ,  Atsuhito Sawabe ,  Takashi Kawanoue ,  Yoshiko Kohanawa ,  Shuichi Komatsu

IPC分类号： C30B25/14 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/822 ,  H01L23/52 ,  H01L23/532 ,  H01L27/04 ,  H01L29/41

CPC分类号： H01L21/28556 ,  H01L21/32051 ,  H01L23/532 ,  H01L23/53219 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53242 ,  H01L23/53247 ,  H01L2924/0002

摘要： The close-packed plane of a single crystal forming an electrode line such as electrodes or lines of a semiconductor device whose active regions are reduced in size, i.e., highly integrated, is arranged parallel to the longitudinal direction of the line; or in the case of a polycrystalline electrode line, the angle formed between the normal line direction of the close-packed plane of its crystal grains and that of the electrode line is arranged to be 80.degree. or less.

公开(公告)号：US5498909A

公开(公告)日：1996-03-12

申请号：US937398

申请日：1992-08-31

申请人： Masahiko Hasunuma ,  Hisashi Kaneko ,  Atsuhito Sawabe ,  Takashi Kawanoue ,  Yoshiko Kohanawa ,  Shuichi Komatsu

发明人： Masahiko Hasunuma ,  Hisashi Kaneko ,  Atsuhito Sawabe ,  Takashi Kawanoue ,  Yoshiko Kohanawa ,  Shuichi Komatsu

IPC分类号： C30B25/14 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/822 ,  H01L23/52 ,  H01L23/532 ,  H01L27/04 ,  H01L29/41 ,  H01L23/48 ,  H01L23/28 ,  H01L29/40

CPC分类号： H01L21/28556 ,  H01L21/32051 ,  H01L23/532 ,  H01L23/53219 ,  H01L23/53223 ,  H01L23/53233 ,  H01L23/53242 ,  H01L23/53247 ,  H01L2924/0002

摘要： The close-packed plane of a single crystal forming an electrode line such as electrodes or lines of a semiconductor device whose active regions are reduced in size, i.e., highly integrated, is arranged parallel to the longitudinal direction of the line; or in the case of a polycrystalline electrode line, the angle formed between the normal line direction of the close-packed plane of its crystal grains and that of the electrode line is arranged to be 80.degree. or less.

摘要翻译： 形成电极线的单晶的紧密平面平行于线的纵向方向布置，其中活性区域尺寸减小，即高度集成的半导体器件的电极或线路的电极线， 或者在多晶电极线的情况下，将其晶粒的紧密接合面的法线方向与电极线的法线方向之间形成的角度设定为80°以下。

公开(公告)号：US5739563A

公开(公告)日：1998-04-14

申请号：US559945

申请日：1995-11-17

申请人： Takashi Kawakubo ,  Kenya Sano ,  Kazuhide Abe ,  Shuichi Komatsu ,  Noburu Fukushima ,  Kazuhiro Eguchi

发明人： Takashi Kawakubo ,  Kenya Sano ,  Kazuhide Abe ,  Shuichi Komatsu ,  Noburu Fukushima ,  Kazuhiro Eguchi

IPC分类号： H01L21/02 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/94 ,  H01L27/108

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

摘要： A semiconductor memory device comprising a silicon substrate, a plurality of switching transistors formed on the silicon substrate, an insulating layer having an opening and formed on a surface portion of the silicon substrate where the plurality of switching transistors formed, and a plurality of capacitors for accumulating electric charge formed on the insulating layer and connected respectively to the switching transistors via a conductive film buried in the opening of insulating layer, wherein each of the capacitors for accumulating electric charge is provided with an underlying crystal layer formed on the insulating layer and with a dielectric film consisting essentially of a ferroelectric material and epitaxially or orientationaly grown on the underlying crystal layer, and the switching transistors and the capacitors for accumulating electric charge connected to each other constitute a plurality of memory cells arranged in a two-dimensional pattern.

摘要翻译： 一种半导体存储器件，包括硅衬底，形成在硅衬底上的多个开关晶体管，具有开口并形成在形成有多个开关晶体管的硅衬底的表面部分上的绝缘层，以及多个用于 累积形成在绝缘层上的电荷，并且经由埋在绝缘层开口中的导电膜分别连接到开关晶体管，其中用于积累电荷的每个电容器设置有形成在绝缘层上的下面的晶体层， 基本上由铁电材料构成并在下面的晶体层上生长的外延或取向的电介质膜，并且用于积累彼此连接的电荷的开关晶体管和电容器构成以二维图案布置的多个存储单元。

公开(公告)号：US5691219A

公开(公告)日：1997-11-25

申请号：US527581

申请日：1995-09-13

申请人： Takashi Kawakubo ,  Kazuhiro Eguchi ,  Shuichi Komatsu ,  Kazuhide Abe

发明人： Takashi Kawakubo ,  Kazuhiro Eguchi ,  Shuichi Komatsu ,  Kazuhide Abe

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L21/70

CPC分类号： H01L28/55 ,  H01L27/10808 ,  H01L28/91 ,  H01L27/10852 ,  Y10S148/014

摘要： A semiconductor memory device having a semiconductor substrate, an insulating layer provided on the substrate, and a memory cell. The memory cell has a switching transistor provided on the substrate and a charge storage element in a trench made in the insulating layer. The charge storage element has a bottom electrode, a dielectric layer and a top electrode deposited one on another in the order mentioned.

摘要翻译： 具有半导体衬底，设置在衬底上的绝缘层和存储单元的半导体存储器件。 存储单元具有设置在基板上的开关晶体管和在绝缘层中形成的沟槽中的电荷存储元件。 电荷存储元件具有下列顺序的底电极，电介质层和顶电极。

公开(公告)号：US5929473A

公开(公告)日：1999-07-27

申请号：US842646

申请日：1997-04-15

申请人： Kazuya Nishihori ,  Yoshiaki Kitaura ,  Yoshikazu Tanabe ,  Tomonori Aoyama ,  Kyoichi Suguro ,  Kumi Okuwada ,  Shuichi Komatsu ,  Kazuhide Abe

发明人： Kazuya Nishihori ,  Yoshiaki Kitaura ,  Yoshikazu Tanabe ,  Tomonori Aoyama ,  Kyoichi Suguro ,  Kumi Okuwada ,  Shuichi Komatsu ,  Kazuhide Abe

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/06 ,  H01L27/095 ,  H01L29/92 ,  H01L29/812

CPC分类号： H01L27/0629 ,  H01L27/0605 ,  H01L27/10852 ,  H01L28/40

摘要： An SiO.sub.2 film and a first wiring layer are arranged in this order on a GaAs substrate. A capacitor is formed on the first wiring layer. The capacitor includes a lower electrode which has a multi-layer structure consisting of a Ti layer, an Mo layer, and a Pt layer in this order from underside. The capacitor also includes a dielectric film made of strontium titanate. The capacitor further includes an upper electrode which has a multi-layer structure consisting of a WN.sub.x layer (120 nm) and a W layer (300 nm) in this order from underside. That surface of the upper electrode, which is in contact with the dielectric film, is defined by the tungsten nitride layer.

摘要翻译： 在GaAs衬底上依次排列有SiO 2膜和第一布线层。 在第一布线层上形成电容器。 电容器包括从下侧依次具有由Ti层，Mo层和Pt层构成的多层结构的下电极。 电容器还包括由钛酸锶制成的电介质膜。 电容器还包括从下侧依次具有由WNx层（120nm）和W层（300nm）构成的多层结构的上部电极。 与电介质膜接触的上电极的表面由氮化钨层限定。

公开(公告)号：US4681251A

公开(公告)日：1987-07-21

申请号：US782163

申请日：1985-10-02

申请人： Shuichi Komatsu ,  Kazumi Shimotori ,  Hiromitsu Takeda ,  Masako Nakahashi

发明人： Shuichi Komatsu ,  Kazumi Shimotori ,  Hiromitsu Takeda ,  Masako Nakahashi

IPC分类号： B23K35/00 ,  B23K35/28 ,  B23K1/04 ,  B23K20/24

CPC分类号： B23K35/004 ,  B23K35/286

摘要： There is disclosed a method of joining Ni-base heat-resisting alloys which comprises forming, under an inert atmosphere, an aluminum layer on at least surfaces to be joined of a constructional member which has been divided into a plural number of parts composed of a Ni-base heat-resisting alloy reinforced by a .gamma.' phase in Ni.sub.3 Al system, followed by heating the parts so that said aluminum is dispersed in said Ni-base heat-resisting alloys, the joining portion (joint) contains substantially no .beta.-NiAl phase and a .gamma.'-Ni.sub.3 Al phase is dispersed therein to join the parts. The joint provided by the method according to the present invention has been improved in its strength and corrosion resistance at a high temperature. Further, the method according to the present invention can be carried out with a high degree of freedom in supplying a joining filler metal.

摘要翻译： 公开了一种接合Ni基耐热合金的方法，其包括在惰性气氛下在至少被划分成多个部分的结构部件的表面上形成铝层的铝层 Ni3Al体系中由γ'相增强的Ni基耐热合金，然后加热部件使得所述铝分散在所述Ni基耐热合金中，所述接合部分（接头）基本上不含β-NiAl 相和γ'-Ni3Al相分散在其中以连接部件。 通过根据本发明的方法提供的接头在高温下的强度和耐腐蚀性得到改善。 此外，根据本发明的方法可以在供给接合填充金属时具有高自由度地进行。

公开(公告)号：US5889299A

公开(公告)日：1999-03-30

申请号：US804394

申请日：1997-02-21

申请人： Kazuhide Abe ,  Shuichi Komatsu ,  Mitsuaki Izuha ,  Noburu Fukushima ,  Kenya Sano ,  Takashi Kawakubo

发明人： Kazuhide Abe ,  Shuichi Komatsu ,  Mitsuaki Izuha ,  Noburu Fukushima ,  Kenya Sano ,  Takashi Kawakubo

IPC分类号： H01L21/02 ,  H01L29/76

CPC分类号： H01L28/55

摘要： A thin film capacitor including a first electrode having on its surface a (100) face of cubic system or a (001) face of tetragonal system, a dielectric thin film epitaxially grown on the first electrode and exhibiting a crystal structure which inherently belongs to a perovskite structure of cubic system, and a second electrode formed on the dielectric thin film. Further, the dielectric thin film meets the following relationship V/V.sub.0 .gtoreq.1.01 where a unit lattice volume of true perovskite crystal structure belonging to the cubic system (lattice constant a.sub.0) is represented by V.sub.0 =a.sub.0.sup.3, and a unit lattice volume (lattice constant a=b.noteq.c) which is strained toward a tetragonal system after the epitaxial growth is represented by V=a.sup.2 c, and also meets the following relationship c/a.gtoreq.1.01 where c/a represents a ratio between a lattice constant "c" in the direction thicknesswise of the film and a lattice constant "a" in the direction parallel with a plane of the film.

摘要翻译： 一种薄膜电容器，包括在其表面上具有立方体系的（100）面或四方晶系的（001）面的第一电极，在第一电极上外延生长并呈现出固有地属于 立方体的钙钛矿结构，以及形成在电介质薄膜上的第二电极。 此外，电介质薄膜满足以下关系V / V0 / = 1.01，其中属于立方体系的真实钙钛矿晶体结构的单位晶格体积（晶格常数a0）由V0 = a03表示，单位晶格体积 晶格常数a = b NOTEQUAL c），其外延生长后由V = a2c表示为四方晶系，并满足以下关系c / a> / = 1.01其中c / a表示晶格常数 在膜的厚度方向上的“c”和与膜的平面平行的方向上的晶格常数“a”。

公开(公告)号：US5670808A

公开(公告)日：1997-09-23

申请号：US591153

申请日：1996-01-25

申请人： Kazuya Nishihori ,  Yoshiaki Kitaura ,  Yoshikazu Tanabe ,  Tomonori Aoyama ,  Kyoichi Suguro ,  Kumi Okuwada ,  Shuichi Komatsu ,  Kazuhide Abe

发明人： Kazuya Nishihori ,  Yoshiaki Kitaura ,  Yoshikazu Tanabe ,  Tomonori Aoyama ,  Kyoichi Suguro ,  Kumi Okuwada ,  Shuichi Komatsu ,  Kazuhide Abe

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/06 ,  H01L27/095 ,  H01L29/92 ,  H01L27/108

CPC分类号： H01L27/0629 ,  H01L27/0605 ,  H01L27/10852 ,  H01L28/40

摘要： A semiconductor device in which an SiO.sub.2 film and a first wiring layer are arranged in this order on a GaAs substrate. A capacitor is formed on the first wiring layer. The capacitor includes a lower electrode which has a multi-layer structure consisting of a Ti layer, an Mo layer, and a Pt layer in this order from underside. The capacitor also includes a dielectric film made of strontium titanate. The capacitor further includes an upper electrode which has a multi-layer structure consisting of a WN.sub.x layer (120 um) and a W layer (300 nm) in this order from underside. That surface of the upper electrode, which is in contact with the dielectric film, is defined by the tungsten nitride layer.

摘要翻译： 其中SiO 2膜和第一布线层依次布置在GaAs衬底上的半导体器件。 在第一布线层上形成电容器。 电容器包括从下侧依次具有由Ti层，Mo层和Pt层构成的多层结构的下电极。 电容器还包括由钛酸锶制成的电介质膜。 电容器还包括从下侧依次具有由WNx层（120μm）和W层（300nm）组成的多层结构的上部电极。 与电介质膜接触的上电极的表面由氮化钨层限定。

公开(公告)号：US4922462A

公开(公告)日：1990-05-01

申请号：US270445

申请日：1988-11-09

申请人： Sumio Ikegawa ,  Yoshiaki Terashima ,  Nobuaki Yasuda ,  Katsutarou Ichihara ,  Shuichi Komatsu ,  Shinji Arai

发明人： Sumio Ikegawa ,  Yoshiaki Terashima ,  Nobuaki Yasuda ,  Katsutarou Ichihara ,  Shuichi Komatsu ,  Shinji Arai

IPC分类号： G11B5/00 ,  G11B7/0055 ,  G11B7/243 ,  G11B11/00 ,  G11B11/06 ,  G11B11/105 ,  G11B11/18 ,  G11B11/20

CPC分类号： G11B7/00454 ,  G11B11/105 ,  G11B11/18 ,  G11B11/20 ,  G11B5/00 ,  G11B7/243 ,  G11B2007/24306 ,  G11B2007/24308 ,  G11B2007/2431

摘要： In a reversible memory system, a pulsed laser beam generated from a laser unit is directed to a recording layer formed on a substrate 1. The recording layer essentially consists of a recording medium, for example, an iron-nickel alloy containing iron as a major component and 27 to 30 atomic % of nickel, which undergoes martensite transformation from a low-temperature phase to a high-temperature phase at a predetermined temperature Af and which undergoes a stress-induced transformation at a characteristic temperature Md. When a region of the recording layer is irradiated with the laser beam having a predetermined intensity, the region undergoes a stress-induced transformation so that the region is changed from the high temperature phase to the low temperature phase.

摘要翻译： 在可逆存储器系统中，从激光单元产生的脉冲激光束被引导到形成在基板1上的记录层。记录层基本上由记录介质，例如含铁作为主要的铁镍合金 成分和27〜30原子％的镍，其在预定温度Af下经历从低温相向高温相的马氏体转变，并且在特征温度Md下经受应力诱导相变，当 用具有预定强度的激光束照射记录层，该区域进行应力诱导变换，使得该区域从高温相变为低温相。

公开(公告)号：US4287417A

公开(公告)日：1981-09-01

申请号：US115884

申请日：1980-01-28

申请人： Shuichi Komatsu ,  Shinichi Nakamura ,  Kazumi Shimotori ,  Yoshio Nakayama

发明人： Shuichi Komatsu ,  Shinichi Nakamura ,  Kazumi Shimotori ,  Yoshio Nakayama

IPC分类号： G01N17/00 ,  G01N33/20 ,  G01N23/00

CPC分类号： G01N17/00 ,  G01N33/20

摘要： A method of determining the degree of deterioration of a heat-resistant ferritic steel part, such as that of Cr-Mo-V steel practically applied in a region of high temperature from at least one of the crystallization factors such as the particle size, interparticle distance and crystallization density of a carbide, particularly V.sub.4 C.sub.3 crystallized out in said ferritic steel part.

摘要翻译： 确定耐热铁素体钢部件的劣化程度的方法，例如Cr-Mo-V钢的实际应用于高温区域中的至少一种结晶因子如粒径，颗粒间 特别是在所述铁素体钢部分中析出的V4C3的碳化物的距离和结晶密度。