公开(公告)号：US06495211B2

公开(公告)日：2002-12-17

申请号：US09882016

申请日：2001-06-18

申请人： Masahiro Iba ,  Hisashi Wakako ,  Kazuhisa Sato ,  Hiroyuki Hashimoto ,  Yasuo Doi

发明人： Masahiro Iba ,  Hisashi Wakako ,  Kazuhisa Sato ,  Hiroyuki Hashimoto ,  Yasuo Doi

IPC分类号： B05D310

CPC分类号： H05K3/187 ,  H01L21/288 ,  H01L21/67028 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15787 ,  H05K3/244 ,  H01L2924/00

摘要： A process for producing a substrate 1 having a base-metal plating layer, which includes an immersion step for immersing the substrate 1 in a plating solution contained in a plating tank 33, to thereby form a base-metal plating layer; a washing step for removing the substrate 1 from the plating tank 33, transferring the substrate 1 to a washing tank, and washing the substrate 1; and a cooling step for applying a cooling liquid to the substrate 1 during at least a portion of the period during which the substrate is transferred to a position where the washing step is carried out after completing the immersion step, to thereby cool the substrate 1. An apparatus for carrying out the above process is also disclosed.

摘要翻译： 一种具有基底金属镀层的基板1的制造方法，其包括将基板1浸渍在镀槽33中所含的镀液中的浸渍工序，从而形成基底金属镀层; 洗涤步骤，用于从电镀槽33去除衬底1，将衬底1转移到洗涤槽中，并洗涤衬底1; 以及在完成浸渍步骤之后将衬底转移到进行洗涤步骤的位置的至少一部分时间内将冷却液施加到衬底1从而冷却衬底1的冷却步骤。 还公开了一种用于执行上述过程的装置。

公开(公告)号：US06887512B2

公开(公告)日：2005-05-03

申请号：US10214727

申请日：2002-08-09

申请人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

发明人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

IPC分类号： H05K3/34 ,  H01L23/12 ,  H01L23/498 ,  H05K3/24 ,  B05D5/12

CPC分类号： H05K3/244 ,  H01L23/49811 ,  H01L2924/0002 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49156 ,  H01L2924/00

摘要： A method for fabricating a component board which includes forming a first main-face-side Au plating layer on surfaces of main-face-side connection terminals and a first back-face-side Au plating layer on surfaces of back-face-side connection terminals of the component board; covering the first main-face-side Au plating layer with a protection layer; forming a second back-face-side Au plating layer on the first back-face-side Au plating layer; and removing the protection layer after completing the second Au plating step. Alternatively, the first back-face-side Au plating layer may be removed after completing the masking step. Displacement Au plating is used as the first and second Au plating.

摘要翻译： 一种部件板的制造方法，其包括在背面侧连接面的主面侧连接端子和第一背面侧Au镀层的表面上形成第一主面侧Au镀层 组件板端子; 用保护层覆盖第一主面Au镀层; 在所述第一背面侧Au镀层上形成第二背面侧Au镀层; 以及在完成第二Au镀层步骤之后去除保护层。 或者，可以在完成掩模步骤之后去除第一背面侧Au镀层。 使用位移Au电镀作为第一和第二Au镀层。

公开(公告)号：US06546622B2

公开(公告)日：2003-04-15

申请号：US09808980

申请日：2001-03-16

申请人： Masahiro Iba ,  Hisashi Wakako ,  Kazuhisa Sato ,  Haruhiko Murata ,  Kazuyuki Takahashi ,  Kenzo Kawaguchi

发明人： Masahiro Iba ,  Hisashi Wakako ,  Kazuhisa Sato ,  Haruhiko Murata ,  Kazuyuki Takahashi ,  Kenzo Kawaguchi

IPC分类号： H05K302

CPC分类号： H01L23/5383 ,  H01L2224/16225 ,  H05K1/0266 ,  H05K3/28 ,  H05K3/381 ,  H05K3/4602 ,  H05K3/4644 ,  H05K2203/107 ,  H05K2203/122 ,  H05K2203/161 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49144 ,  Y10T29/49155 ,  Y10T29/49156 ,  Y10T29/49158

摘要： A printed-wiring substrate 1 includes internal dielectric resin layers 12 and 14. A main-surface-side external dielectric resin layer 13 is formed on the internal dielectric resin layer 12 such that the surface thereof serves as a substrate main-surface 1A. A back-surface-side external dielectric resin layer 15 is formed on the internal dielectric resin layer 14 such that the surface thereof serves as a substrate back-surface 1B. A surface 12A of the main-surface-side internal dielectric resin layer 12 and a surface 14A of the back-surface-side internal dielectric resin layer 14 are roughened. The substrate main-surface 1A and the substrate back-surface 1B are roughened such that surface roughness thereof is lower than that of the surfaces 12A and 14A.

摘要翻译： 印刷布线基板1包括内部电介质树脂层12和14.主表面侧外部电介质树脂层13形成在内部电介质树脂层12上，使得其表面用作基板主表面1A。 在内部电介质树脂层14上形成背面侧外部电介质树脂层15，使其表面作为基板背面1B。 主表面侧内部电介质树脂层12的表面12A和背面侧内部电介质树脂层14的表面14A被粗糙化。 基板主表面1A和基板背面1B被粗糙化，使得表面粗糙度低于表面12A和14A的表面粗糙度。

公开(公告)号：US06472609B2

公开(公告)日：2002-10-29

申请号：US09866999

申请日：2001-05-25

申请人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

发明人： Hisashi Wakako ,  Masahiro Iba ,  Kazuhisa Sato ,  Kazuo Kimura

IPC分类号： H05K103

CPC分类号： H05K3/244 ,  H01L23/49811 ,  H01L2924/0002 ,  Y10T29/49128 ,  Y10T29/49147 ,  Y10T29/49156 ,  H01L2924/00

摘要： A printed-wiring substrate 1 has main-face-side connection terminals 33 for solder-bonding to connection terminals 83 of an IC chip 81 on a main face 1A thereof and back-face-side connection terminals 41 for connecting, through mechanical contact, to connection terminals 93 of a motherboard 91 on a back face 1B thereof. The surface of each of the main-face-side connection terminals 33 is covered with a main-face-side displacement Au plating layer 45 having a thickness of 0.03 to 0.12 &mgr;m, and the surface of each of the back-face-side connection terminals 41 is covered with a back-face-side displacement Au plating layer 55, which is thicker than the main-face-side displacement Au plating layer 45 and has a thickness of 0.2 &mgr;m or greater.

摘要翻译： 印刷布线基板1具有用于焊接到其主面1A上的IC芯片81的连接端子83的主面侧连接端子33和用于通过机械接触连接的背面侧连接端子41， 连接到母板91的背面1B上的连接端子93。 每个主面侧连接端子33的表面被厚度为0.03至0.12μm的主面侧位移Au镀层45覆盖，并且每个背面侧连接 端子41覆盖有比主面侧位移Au镀层45厚的厚度为0.2μm以上的背面侧位移Au镀层55。

公开(公告)号：US5798566A

公开(公告)日：1998-08-25

申请号：US976501

申请日：1997-11-24

申请人： Kazuhisa Sato ,  Masanori Kitou ,  Hisashi Wakako ,  Kazuo Kimura

发明人： Kazuhisa Sato ,  Masanori Kitou ,  Hisashi Wakako ,  Kazuo Kimura

IPC分类号： H01L23/367 ,  H01L23/373 ,  H01L23/34 ,  H01L23/06 ,  H01L23/10 ,  H01L23/15

CPC分类号： H01L23/3735 ,  H01L23/367 ,  H01L23/3672 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/09701 ,  H01L2924/15174

摘要： In accordance with the present invention, there is provided a ceramic IC package base which comprises a ceramic substrate, and a heat radiating member adhered to a side surface of the ceramic substrate and made of copper or copper alloy. The heat radiating member has an adhering portion at which it is adhered to the ceramic substrate. The adhering portion, when the heat radiating member is observed in a plan view, has one side which is equal to or larger than 8 mm. The adhering portion is of the thickness within the range from 0.25 mm to 0.76 mm. A ceramic IC package cover is also provided.

摘要翻译： 根据本发明，提供了一种陶瓷IC封装基座，其包括陶瓷基板和粘附到陶瓷基板的侧表面并由铜或铜合金制成的散热构件。 散热构件具有粘附到陶瓷基板上的粘附部分。 当在平面图中观察散热构件时，粘附部分具有等于或大于8mm的一侧。 粘合部分的厚度在0.25mm至0.76mm的范围内。 还提供陶瓷IC封装盖。

公开(公告)号：US06486551B1

公开(公告)日：2002-11-26

申请号：US09340672

申请日：1999-06-29

申请人： Kazuhisa Sato ,  Hiroyuki Hashimoto

发明人： Kazuhisa Sato ,  Hiroyuki Hashimoto

IPC分类号： A01L2348

CPC分类号： H05K3/246 ,  H01L23/49811 ,  H01L23/538 ,  H01L24/02 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/16195 ,  H01L2924/30107 ,  H05K1/092 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

摘要： A wired board comprises a plurality of bonding pads for connection to connecting terminals of an electronic part, and a plurality of external connection terminals for connection to connecting terminals of an external circuit board such as a motherboard. Each of the bonding pads has a metallized layer, and further has a Ni—B-plated layer, a Ni—P-plated layer and a Au-plated layer which are formed in this order on the metallized layer. The Au-plated layer has the thickness ranging from 1.2 to 3.5 &mgr;m. Each of the external connection terminals has a metallized layer, and further has a Ni—B-plated layer and a Au-plated layer which are formed in this order on the metallized layer of each of the external connection terminals. The Au-plated layer of each of the external connection terminals has the thickness ranging from 0.01 to 1 &mgr;m. A method of producing the wired board is also provided.

摘要翻译： 布线板包括用于连接到电子部件的连接端子的多个接合焊盘和用于连接到诸如主板的外部电路板的连接端子的多个外部连接端子。 每个接合焊盘具有金属化层，并且还具有在金属化层上依次形成的Ni-B镀层，Ni-P镀层和Au镀层。 镀金层的厚度范围为1.2-3.5μm。 每个外部连接端子具有金属化层，并且还具有在每个外部连接端子的金属化层上依次形成的Ni-B镀层和Au镀层。 每个外部连接端子的镀覆层的厚度范围为0.01至1μm。 还提供了生产该布线板的方法。

公开(公告)号：US06225569B1

公开(公告)日：2001-05-01

申请号：US08970501

申请日：1997-11-14

申请人： Hiroyuki Hashimoto ,  Kazuhisa Sato

发明人： Hiroyuki Hashimoto ,  Kazuhisa Sato

IPC分类号： H05K116

CPC分类号： H05K3/246 ,  H01L23/49811 ,  H01L2924/0002 ,  H01L2924/09701 ,  H05K1/092 ,  H01L2924/00

摘要： A wiring substrate to which an IC chip is connected through soldering is formed from ceramic having electrode pads formed of a metallization layer. At least one nickel layer is formed on the electrode pads. The nickel layer has a thickness in the range of 2.5 &mgr;m to 8 &mgr;m. The nickel layer is preferably composed of a plurality of plated layers, and the outermost layer thereof is preferably formed through Ni-B plating. A gold plating layer is preferably formed on the outermost nickel layer. Further, heating is advantageously performed at least one time during the formation of the plurality of nickel layers.

摘要翻译： 通过焊接连接IC芯片的布线基板由具有由金属化层形成的电极焊盘的陶瓷形成。 在电极焊盘上形成至少一层镍层。 镍层的厚度在2.5μm到8μm的范围内。 镍层优选由多个镀层构成，其最外层优选通过Ni-B镀层形成。 优选在最外层的镍层上形成镀金层。 此外，在形成多个镍层期间有利地进行加热至少一次。

公开(公告)号：USD689387S1

公开(公告)日：2013-09-10

申请号：US29426374

申请日：2012-07-05

申请人： Hiroshi Muraoka ,  Kazuhisa Sato

设计人： Hiroshi Muraoka ,  Kazuhisa Sato

公开(公告)号：US20050155789A1

公开(公告)日：2005-07-21

申请号：US11078063

申请日：2005-03-11

申请人： Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

发明人： Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

IPC分类号： B32B15/08 ,  B32B27/38 ,  H05K1/05 ,  H05K3/00 ,  H05K3/44 ,  H05K1/03 ,  H05K1/11

CPC分类号： H05K1/056 ,  B32B15/08 ,  B32B27/38 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/0909 ,  H05K2201/09709 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49165 ,  Y10T83/0333 ,  Y10T83/0341 ,  Y10T83/0581 ,  Y10T428/12 ,  Y10T428/12361 ,  Y10T428/15 ,  Y10T428/24298 ,  Y10T428/24314 ,  Y10T428/24917

摘要： The invention provides a method for manufacturing printed wiring substrates which can manufacture printed wiring substrates each having resin dielectric layers of uniform thickness and excellent surface flatness while maintaining favorable cutting performance in a dicing step. A multi-printed wiring-substrate panel is manufactured which includes a metal plate having a first main surface and a second main surface, and resin dielectric layers disposed on the first and second main surfaces. The metal plate has first depression portions and second depression portions. The first depression portions are opened at the first main surface and arranged discontinuously along predetermined cutting lines. The second depression portions are opened at the second main surface and arranged discontinuously along the predetermined cutting lines. The multi-printed wiring-substrate panel is cut along the predetermined cutting lines into a plurality of printed wiring substrates.

公开(公告)号：US06872436B2

公开(公告)日：2005-03-29

申请号：US10340031

申请日：2003-01-10

申请人： Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

发明人： Tomoe Suzuki ,  Shinji Yuri ,  Kazuhisa Sato ,  Kozo Yamasaki

IPC分类号： B32B15/08 ,  B32B27/38 ,  H05K1/05 ,  H05K3/00 ,  H05K3/44 ,  B23B3/10

CPC分类号： H05K1/056 ,  B32B15/08 ,  B32B27/38 ,  H05K3/0052 ,  H05K3/44 ,  H05K3/445 ,  H05K2201/0909 ,  H05K2201/09709 ,  H05K2201/09745 ,  H05K2203/0369 ,  H05K2203/1572 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49135 ,  Y10T29/49165 ,  Y10T83/0333 ,  Y10T83/0341 ,  Y10T83/0581 ,  Y10T428/12 ,  Y10T428/12361 ,  Y10T428/15 ,  Y10T428/24298 ,  Y10T428/24314 ,  Y10T428/24917

摘要： The invention provides a method for manufacturing printed wiring substrates which can manufacture printed wiring substrates each having resin dielectric layers of uniform thickness and excellent surface flatness while maintaining favorable cutting performance in a dicing step. A multi-printed wiring-substrate panel is manufactured which includes a metal plate having a first main surface and a second main surface, and resin dielectric layers disposed on the first and second main surfaces. The metal plate has first depression portions and second depression portions. The first depression portions are opened at the first main surface and arranged discontinuously along predetermined cutting lines. The second depression portions are opened at the second main surface and arranged discontinuously along the predetermined cutting lines. The multi-printed wiring-substrate panel is cut along the predetermined cutting lines into a plurality of printed wiring substrates.