公开(公告)号：US20070182312A1

公开(公告)日：2007-08-09

申请号：US11672601

申请日：2007-02-08

申请人： Masakazu Sagawa ,  Tatsumi Hirano ,  Hideyuki Shintani ,  Ken Okutani

发明人： Masakazu Sagawa ,  Tatsumi Hirano ,  Hideyuki Shintani ,  Ken Okutani

IPC分类号： H01J63/04 ,  H01J1/62

CPC分类号： H01J1/312 ,  B82Y10/00

摘要： In order too control the non-uniformity of electron emission amount within the surface or between adjacent pixels which is a cause for formation non-uniformity when forming, using anodization, an electron acceleration layer for an MIM type diode element which is appropriate for a thin film electron source, there is provided an insulation layer 12 which forms a MIM type diode element as a non-crystalline oxidized film which is formed by anodization of the surface of a lower electrode 11 with the formation of the lower electrode 11 as laminated layers which have a single layer film of aluminum or aluminum alloy or an outer layer of any of these, with a non-phosphor as a single layer film of aluminum or aluminum alloy which is anodized.

摘要翻译： 为了进一步控制表面或相邻像素之间的电子发射量的不均匀性，这是在使用阳极氧化形成MIM型二极管元件的电子加速层时形成不均匀的原因，其适用于薄 提供了形成作为非晶氧化膜的MIM型二极管元件的绝缘层12，其通过下电极11的表面的阳极氧化形成，形成下电极11作为层压层， 具有铝或铝合金的单层膜或其中任一种的外层，其中非磷光体作为阳极氧化的铝或铝合金的单层膜。

公开(公告)号：US06897570B2

公开(公告)日：2005-05-24

申请号：US10340307

申请日：2003-01-09

申请人： Takashi Nakajima ,  Naotaka Tanaka ,  Yasuyuki Nakajima ,  Ryo Haruta ,  Tomoo Matsuzawa ,  Masashi Sahara ,  Ken Okutani

发明人： Takashi Nakajima ,  Naotaka Tanaka ,  Yasuyuki Nakajima ,  Ryo Haruta ,  Tomoo Matsuzawa ,  Masashi Sahara ,  Ken Okutani

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/522 ,  H01L29/40

CPC分类号： H01L24/05 ,  H01L23/485 ,  H01L23/5226 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05082 ,  H01L2224/05093 ,  H01L2224/05096 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05556 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4807 ,  H01L2224/48453 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48724 ,  H01L2224/48799 ,  H01L2224/48824 ,  H01L2224/85205 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01044 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/05042 ,  H01L2924/20106 ,  H01L2924/20303 ,  H01L2924/20752 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/04953 ,  H01L2924/00 ,  H01L2924/00011

摘要： A highly reliable semiconductor device provided herein can prevent a junction between a pad and a wire from coming off, and pads from peeling off an underlying insulating layer on the interface thereof. The semiconductor device has plugs formed in a region in which an electrode pad is formed over a substrate. The plugs protrude into the electrode pad.

摘要翻译： 这里提供的高度可靠的半导体器件可以防止焊盘和电线之间的接合脱落，并且焊盘从其界面上的下面的绝缘层剥离。 半导体器件具有形成在电极焊盘形成在衬底上的区域中的插塞。 插头突出到电极垫中。

公开(公告)号：US06764945B2

公开(公告)日：2004-07-20

申请号：US09822318

申请日：2001-04-02

申请人： Hiroshi Ashihara ,  Tatsuyuki Saito ,  Uitsu Tanaka ,  Hidenori Suzuki ,  Hideaki Tsugane ,  Yasuko Yoshida ,  Ken Okutani

发明人： Hiroshi Ashihara ,  Tatsuyuki Saito ,  Uitsu Tanaka ,  Hidenori Suzuki ,  Hideaki Tsugane ,  Yasuko Yoshida ,  Ken Okutani

IPC分类号： H01L214763

CPC分类号： H01L21/2855 ,  H01L21/28556 ,  H01L21/32051 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76877 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

摘要： In order to form a good contact between metallizations and improve the reliability and product yield of a semiconductor integrated circuit device, a plug is formed in a contact hole by depositing a first sputter film inside of the contact hole by traditional sputtering, depositing a second sputter film over the first sputter film by long throw sputtering, depositing a W film over the second sputtering film by CVD and removing the first and second sputter films and the W film from the outside of the contact hole. The barrier properties can be improved by constituting a barrier film from the first sputter film and second sputter film which are different in directivity.

摘要翻译： 为了在金属化之间形成良好的接触并提高半导体集成电路器件的可靠性和产品产量，通过传统溅射在接触孔内部沉积第一溅射膜，在接触孔中形成插塞，沉积第二溅射 通过长溅射溅射第一溅射膜上的膜，通过CVD在第二溅射膜上沉积W膜，并从接触孔的外部除去第一和第二溅射膜和W膜。 可以通过从方向性不同的第一溅射膜和第二溅射膜构成阻挡膜来改善阻挡性。

公开(公告)号：US07189636B2

公开(公告)日：2007-03-13

申请号：US10733377

申请日：2003-12-12

申请人： Kazuhito Ichinose ,  Hidetsugu Ogishi ,  Ken Okutani

发明人： Kazuhito Ichinose ,  Hidetsugu Ogishi ,  Ken Okutani

IPC分类号： H01L21/44

CPC分类号： H01L21/28518

摘要： A low resistance Co silicide layer with less leakage current is formed over the surface of the source and drain of a MISFET by optimizing the film forming conditions and annealing conditions upon formation of Co (cobalt) silicide. More specifically, a low resistance source and drain (n+ type semiconductor regions, p+ type semiconductor regions) with less junction leakage current are formed, upon formation of a Co silicide layer by heat treating a Co film deposited over the source and drain (n+ type semiconductor regions, p+ type semiconductor regions) of the MISFET, by depositing the Co film at a temperature as low as 200° C. or less, carrying out heat treatment in three stages to convert the Co silicide layer from a dicobalt silicide (Co2Si) layer to a cobalt monosilicide (CoSi) layer and, then, to a cobalt disilicide (CoSi2) layer, successively.

摘要翻译： 通过在形成Co（钴）硅化物时优化成膜条件和退火条件，在MISFET的源极和漏极的表面上形成具有较小漏电流的低电阻Co硅化物层。 更具体地说，在形成Co硅化物时形成具有较少结漏电流的低电阻源极和漏极（n + + +型半导体区域，p + + +型半导体区域） 层，通过将Co膜沉积在MISFET的源极和漏极（n + SUP +型半导体区域，p + SUP +型半导体区域）上沉积的Co膜， 低于200℃或更低的温度，进行三级热处理以将Co硅化物层从二硅化钴（Co 2 Si 2 Si）层转化成一钴硅（CoSi）层 然后依次连接到二硅化钴（CoSi 2 N 2）层。

公开(公告)号：US5135608A

公开(公告)日：1992-08-04

申请号：US550694

申请日：1990-07-10

申请人： Ken Okutani

发明人： Ken Okutani

IPC分类号： H01L21/00

CPC分类号： H01L21/67167 ,  H01L24/03 ,  H01L24/05 ,  H01L24/29 ,  H01L29/456 ,  H01L29/7322 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05166 ,  H01L2224/05624 ,  H01L2224/29144 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/48624 ,  H01L2224/73265 ,  H01L2224/83805 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/20752 ,  Y10S414/137 ,  Y10S414/139 ,  Y10S414/141

摘要： A process and apparatus for producing semiconductor integrated circuit devices wherein the dry processing and the wet processing are continuously effected for the wafers to be processed, and the wafers are transferred between these processings under a vacuum condition or in a purging gas without being allowed to come in contact with the open air, to avoid adverse effects that will be caused by the open air.

公开(公告)号：US07088001B2

公开(公告)日：2006-08-08

申请号：US10844479

申请日：2004-05-13

申请人： Hiroshi Ashihara ,  Tatsuyuki Saito ,  Uitsu Tanaka ,  Hidenori Suzuki ,  Hideaki Tsugane ,  Yasuko Yoshida ,  Ken Okutani

发明人： Hiroshi Ashihara ,  Tatsuyuki Saito ,  Uitsu Tanaka ,  Hidenori Suzuki ,  Hideaki Tsugane ,  Yasuko Yoshida ,  Ken Okutani

IPC分类号： H01L23/48

CPC分类号： H01L21/2855 ,  H01L21/28556 ,  H01L21/32051 ,  H01L21/76801 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76855 ,  H01L21/76877 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

摘要： In order to form a good contact between metallizations and improve the reliability and product yield of a semiconductor integrated circuit device, a plug is formed in a contact hole by depositing a first sputter film inside of the contact hole by traditional sputtering, depositing a second sputter film over the first sputter film by long throw sputtering, depositing a W film over the second sputtering film by CVD and removing the first and second sputter films and the W film from the outside of the contact hole. The barrier properties can be improved by constituting a barrier film from the first sputter film and second sputter film which are different in directivity.

摘要翻译： 为了在金属化之间形成良好的接触并提高半导体集成电路器件的可靠性和产品产量，通过传统溅射在接触孔内部沉积第一溅射膜，在接触孔中形成插塞，沉积第二溅射 通过长溅射溅射第一溅射膜上的膜，通过CVD在第二溅射膜上沉积W膜，并从接触孔的外部除去第一和第二溅射膜和W膜。 可以通过从方向性不同的第一溅射膜和第二溅射膜构成阻挡膜来改善阻挡性。