公开(公告)号：US08815701B2

公开(公告)日：2014-08-26

申请号：US13546040

申请日：2012-07-11

申请人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

发明人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

IPC分类号： H01L21/762 ,  H01L27/12 ,  H01L27/06 ,  H01L21/8234 ,  H01L27/02 ,  H01L21/84 ,  H01L29/06 ,  H01L29/78 ,  H01L21/265

CPC分类号： H01L21/823481 ,  H01L21/26533 ,  H01L21/76243 ,  H01L21/76264 ,  H01L21/823487 ,  H01L21/84 ,  H01L27/0251 ,  H01L27/0629 ,  H01L27/1203 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the first insulation film and the SOI layer, which are stacked in this order, and the second region has only the support layer. The trench separation element penetrates the support layer, the first insulation film and the SOI layer. The trench separation element separates the first region and the second region. The first circuit is disposed in the SOI layer of the first region. The second circuit is disposed in the support layer of the second region.

摘要翻译： 半导体器件包括：SOI衬底，包括支撑层，第一绝缘膜和SOI层; 第一个电路; 第二电路; 和沟槽分离元件。 SOI衬底还包括第一区域和第二区域。 第一区域具有依次层叠的支撑层，第一绝缘膜和SOI层，第二区域仅具有支撑层。 沟槽分离元件穿透支撑层，第一绝缘膜和SOI层。 沟槽分离元件分离第一区域和第二区域。 第一电路设置在第一区域的SOI层中。 第二电路设置在第二区域的支撑层中。

公开(公告)号：US20120302036A1

公开(公告)日：2012-11-29

申请号：US13546040

申请日：2012-07-11

申请人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

发明人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

IPC分类号： H01L21/762

CPC分类号： H01L21/823481 ,  H01L21/26533 ,  H01L21/76243 ,  H01L21/76264 ,  H01L21/823487 ,  H01L21/84 ,  H01L27/0251 ,  H01L27/0629 ,  H01L27/1203 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the first insulation film and the SOI layer, which are stacked in this order, and the second region has only the support layer. The trench separation element penetrates the support layer, the first insulation film and the SOI layer. The trench separation element separates the first region and the second region. The first circuit is disposed in the SOI layer of the first region. The second circuit is disposed in the support layer of the second region.

摘要翻译： 半导体器件包括：SOI衬底，包括支撑层，第一绝缘膜和SOI层; 第一个电路; 第二电路; 和沟槽分离元件。 SOI衬底还包括第一区域和第二区域。 第一区域具有依次层叠的支撑层，第一绝缘膜和SOI层，第二区域仅具有支撑层。 沟槽分离元件穿透支撑层，第一绝缘膜和SOI层。 沟槽分离元件分离第一区域和第二区域。 第一电路设置在第一区域的SOI层中。 第二电路设置在第二区域的支撑层中。

公开(公告)号：US08278731B2

公开(公告)日：2012-10-02

申请号：US12289773

申请日：2008-11-04

申请人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

发明人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

IPC分类号： H01L21/762 ,  H01L27/12

CPC分类号： H01L21/823481 ,  H01L21/26533 ,  H01L21/76243 ,  H01L21/76264 ,  H01L21/823487 ,  H01L21/84 ,  H01L27/0251 ,  H01L27/0629 ,  H01L27/1203 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the first insulation film and the SOI layer, which are stacked in this order, and the second region has only the support layer. The trench separation element penetrates the support layer, the first insulation film and the SOI layer. The trench separation element separates the first region and the second region. The first circuit is disposed in the SOI layer of the first region. The second circuit is disposed in the support layer of the second region.

摘要翻译： 半导体器件包括：SOI衬底，包括支撑层，第一绝缘膜和SOI层; 第一个电路; 第二电路; 和沟槽分离元件。 SOI衬底还包括第一区域和第二区域。 第一区域具有依次层叠的支撑层，第一绝缘膜和SOI层，第二区域仅具有支撑层。 沟槽分离元件穿透支撑层，第一绝缘膜和SOI层。 沟槽分离元件分离第一区域和第二区域。 第一电路设置在第一区域的SOI层中。 第二电路设置在第二区域的支撑层中。

公开(公告)号：US20090127624A1

公开(公告)日：2009-05-21

申请号：US12289773

申请日：2008-11-04

申请人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

发明人： Masakiyo Sumitomo ,  Makoto Asai ,  Nozomu Akagi ,  Yasuhiro Kitamura ,  Hiroki Nakamura ,  Tetsuo Fujii

IPC分类号： H01L21/762 ,  H01L27/12

CPC分类号： H01L21/823481 ,  H01L21/26533 ,  H01L21/76243 ,  H01L21/76264 ,  H01L21/823487 ,  H01L21/84 ,  H01L27/0251 ,  H01L27/0629 ,  H01L27/1203 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/7813 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a SOI substrate including a support layer, a first insulation film and a SOI layer; a first circuit; a second circuit; and a trench separation element. The SOI substrate further includes a first region and a second region. The first region has the support layer, the first insulation film and the SOI layer, which are stacked in this order, and the second region has only the support layer. The trench separation element penetrates the support layer, the first insulation film and the SOI layer. The trench separation element separates the first region and the second region. The first circuit is disposed in the SOI layer of the first region. The second circuit is disposed in the support layer of the second region.

摘要翻译： 半导体器件包括：SOI衬底，包括支撑层，第一绝缘膜和SOI层; 第一个电路; 第二电路; 和沟槽分离元件。 SOI衬底还包括第一区域和第二区域。 第一区域具有依次层叠的支撑层，第一绝缘膜和SOI层，第二区域仅具有支撑层。 沟槽分离元件穿透支撑层，第一绝缘膜和SOI层。 沟槽分离元件分离第一区域和第二区域。 第一电路设置在第一区域的SOI层中。 第二电路设置在第二区域的支撑层中。

公开(公告)号：US07833876B2

公开(公告)日：2010-11-16

申请号：US12230209

申请日：2008-08-26

申请人： Nozomu Akagi ,  Yasuhiro Kitamura ,  Tetsuo Fujii

发明人： Nozomu Akagi ,  Yasuhiro Kitamura ,  Tetsuo Fujii

IPC分类号： H01L21/76

CPC分类号： H01L21/76264 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a manufacturing of a semiconductor device, at least one of elements is formed in each of element formation regions of a substrate having a main side and a rear side, and the substrate is thinned by polished from a rear side of the substrate, and then, multiple trenches are formed on the rear side of the substrate, so that each trench reaches the main side of the substrate. After that, an insulating material is deposited over an inner surface of each trench to form an insulating layer in the trench, so that the element formation regions are isolated. Thereby, generation of cracks and structural steps in the substrate and separation of element formation regions from the substrate can be suppressed.

摘要翻译： 在半导体器件的制造中，在具有主侧和后侧的基板的元件形成区域中的至少一个元件形成区域中形成至少一个元件，并且通过从基板的后侧抛光基板而使基板变薄 在衬底的后侧形成多个沟槽，使得每个沟槽到达衬底的主侧。 之后，绝缘材料沉积在每个沟槽的内表面上，以在沟槽中形成绝缘层，使得元件形成区域被隔离。 由此，可以抑制基板的裂纹和结构的产生，并且能够抑制元件形成区域与基板的分离。

公开(公告)号：US20090057812A1

公开(公告)日：2009-03-05

申请号：US12230209

申请日：2008-08-26

申请人： Nozomu Akagi ,  Yasuhiro Kitamura ,  Tetsuo Fujii

发明人： Nozomu Akagi ,  Yasuhiro Kitamura ,  Tetsuo Fujii

IPC分类号： H01L29/06 ,  H01L21/76

CPC分类号： H01L21/76264 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： In a manufacturing of a semiconductor device, at least one of elements is formed in each of element formation regions of a substrate having a main side and a rear side, and the substrate is thinned by polished from a rear side of the substrate, and then, multiple trenches are formed on the rear side of the substrate, so that each trench reaches the main side of the substrate. After that, an insulating material is deposited over an inner surface of each trench to form an insulating layer in the trench, so that the element formation regions are isolated. Thereby, generation of cracks and structural steps in the substrate and separation of element formation regions from the substrate can be suppressed.

摘要翻译： 在半导体器件的制造中，在具有主侧和后侧的基板的元件形成区域中的至少一个元件形成区域中形成至少一个元件，并且通过从基板的后侧抛光基板而使基板变薄 在衬底的后侧形成多个沟槽，使得每个沟槽到达衬底的主侧。 之后，绝缘材料沉积在每个沟槽的内表面上，以在沟槽中形成绝缘层，使得元件形成区域被隔离。 由此，可以抑制基板的裂纹和结构的产生，并且能够抑制元件形成区域与基板的分离。

公开(公告)号：US07893458B2

公开(公告)日：2011-02-22

申请号：US11892819

申请日：2007-08-28

申请人： Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

发明人： Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

IPC分类号： H01L29/74 ,  H01L29/76

CPC分类号： H01L27/0727 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7817 ,  H01L29/7821

摘要： A semiconductor device includes: a semiconductor substrate; a lateral MOS transistor disposed in the substrate; a Zener diode disposed in the substrate; and a capacitor disposed in the substrate. The transistor includes a drain and a gate, and the diode and the capacitor are coupled in series between the drain and the gate. This device has minimized dimensions and high switching speed. Further, both of a switching loss and a surge voltage are improved.

摘要翻译： 半导体器件包括：半导体衬底; 设置在基板中的横向MOS晶体管; 设置在基板中的齐纳二极管; 以及设置在基板中的电容器。 晶体管包括漏极和栅极，并且二极管和电容器串联耦合在漏极和栅极之间。 该设备具有最小的尺寸和高切换速度。 此外，改善了开关损耗和浪涌电压两者。

公开(公告)号：US20090114985A1

公开(公告)日：2009-05-07

申请号：US12289772

申请日：2008-11-04

申请人： Nozomu Akagi ,  Hitoshi Yamaguchi ,  Tetsuo Fujii

发明人： Nozomu Akagi ,  Hitoshi Yamaguchi ,  Tetsuo Fujii

IPC分类号： H01L21/336 ,  H01L29/78

CPC分类号： H01L29/7813 ,  H01L22/14 ,  H01L27/0921 ,  H01L27/0922 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766

摘要： A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate that has a first surface and a second surface opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements each having a pair of electrodes located respectively on the first and second surfaces of the semiconductor substrate. A current flows between the first and second electrode. Each double-sided electrode element has a PN column region located in the semiconductor substrate. The semiconductor apparatus further includes an insulation trench that surrounds each of multiple double-sided electrode elements, and that insulates and separates the multiple double-sided electrode elements from each other.

摘要翻译： 公开了一种半导体装置。 该半导体装置包括具有彼此相对的第一表面和第二表面的半导体衬底。 半导体装置还包括多个双面电极元件，每个双面电极元件分别具有位于半导体衬底的第一和第二表面上的一对电极。 A电流在第一和第二电极之间流动。 每个双面电极元件具有位于半导体衬底中的PN列区域。 半导体装置还包括围绕多个双面电极元件中的每一个的绝缘沟槽，并且使多个双面电极元件彼此绝缘和分离。

公开(公告)号：US07911023B2

公开(公告)日：2011-03-22

申请号：US12289772

申请日：2008-11-04

申请人： Nozomu Akagi ,  Hitoshi Yamaguchi ,  Tetsuo Fujii

发明人： Nozomu Akagi ,  Hitoshi Yamaguchi ,  Tetsuo Fujii

IPC分类号： H01L21/70

CPC分类号： H01L29/7813 ,  H01L22/14 ,  H01L27/0921 ,  H01L27/0922 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766

摘要： A semiconductor apparatus is disclosed. The semiconductor apparatus includes a semiconductor substrate that has a first surface and a second surface opposite to each other. The semiconductor apparatus further includes multiple double-sided electrode elements each having a pair of electrodes located respectively on the first and second surfaces of the semiconductor substrate. A current flows between the first and second electrode. Each double-sided electrode element has a PN column region located in the semiconductor substrate. The semiconductor apparatus further includes an insulation trench that surrounds each of multiple double-sided electrode elements, and that insulates and separates the multiple double-sided electrode elements from each other.

摘要翻译： 公开了一种半导体装置。 半导体装置包括具有彼此相对的第一表面和第二表面的半导体衬底。 半导体装置还包括多个双面电极元件，每个双面电极元件分别具有位于半导体衬底的第一和第二表面上的一对电极。 A电流在第一和第二电极之间流动。 每个双面电极元件具有位于半导体衬底中的PN列区域。 半导体装置还包括围绕多个双面电极元件中的每一个的绝缘沟槽，并且使多个双面电极元件彼此绝缘和分离。

公开(公告)号：US20080054325A1

公开(公告)日：2008-03-06

申请号：US11892819

申请日：2007-08-28

申请人： Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

发明人： Shigeki Takahashi ,  Takashi Nakano ,  Nozomu Akagi ,  Yasushi Higuchi ,  Tetsuo Fujii ,  Yoshiyuki Hattori ,  Makoto Kuwahara ,  Kyoko Okada

IPC分类号： H01L27/06

CPC分类号： H01L27/0727 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7817 ,  H01L29/7821

摘要： A semiconductor device includes: a semiconductor substrate; a lateral MOS transistor disposed in the substrate; a Zener diode disposed in the substrate; and a capacitor disposed in the substrate. The transistor includes a drain and a gate, and the diode and the capacitor are coupled in series between the drain and the gate. This device has minimized dimensions and high switching speed. Further, both of a switching loss and a surge voltage are improved.

摘要翻译： 半导体器件包括：半导体衬底; 设置在基板中的横向MOS晶体管; 设置在基板中的齐纳二极管; 以及设置在基板中的电容器。 晶体管包括漏极和栅极，并且二极管和电容器串联耦合在漏极和栅极之间。 该设备具有最小的尺寸和高切换速度。 此外，改善了开关损耗和浪涌电压两者。