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    CMOS differential amplifier for a delta sigma modulator applicable for an analog-to-digital converter
    1.
    发明授权
    CMOS differential amplifier for a delta sigma modulator applicable for an analog-to-digital converter 失效
    适用于模数转换器的三角形Σ调制器的CMOS差分放大器

    公开(公告)号：US6018262A

    公开(公告)日：2000-01-25

    申请号：US67046

    申请日：1998-04-27

    申请人： Masao Noro ,  Yusuke Yamamoto ,  Toshio Maejima

    发明人： Masao Noro ,  Yusuke Yamamoto ,  Toshio Maejima

    IPC分类号： H03M3/02 ,  H03K5/08

    CPC分类号： H03M3/444 ,  H03M3/43

    摘要： An analog-digital converter includes a .DELTA..SIGMA. modulator, a digital filter, a high-pass filter and a multiplier which are connected in series. Analog input is converted into serial-bit strings by the .DELTA..SIGMA. modulator, for which gain `1/A` is set. The digital filter extracts low-frequency components, corresponding to the analog input, from the serial-bit strings, so the low-frequency components are converted into parallel-bit digital data. The high-pass filter removes DC offset component from output of the digital filter; and then, output thereof is multiplied by scaling gain `A` by the multiplier so that digital output is produced. The .DELTA..SIGMA. modulator includes at least three switched-capacitor integrators and a one-bit quantizer, which are connected in series, as well as a one-sample delay circuit. One-bit output, produced by the one-bit quantizer, is delayed by the one-sample delay circuit, whose output is delivered to each switched-capacitor integrator. Each switched-capacitor integrator is configured using a CMOS differential amplifier which is configured by a CMOS operational amplifier and at least one amplitude-limiting circuit. The amplitude-limiting circuit is configured by two PMOS transistors and two NMOS transistors which are connected in parallel in a diode-connection manner; and this circuit is provided to limit amplitude in output of the CMOS differential amplifier by stabilizing its operating point.

    摘要翻译： 模拟数字转换器包括串联连接的DELTA SIGMA调制器，数字滤波器，高通滤波器和乘法器。 模拟输入通过DELTA SIGMA调制器转换成串行位串，为其设置增益'1 / A'。 数字滤波器从串行比特串中提取与模拟输入相对应的低频分量，因此低频分量转换为并行位数字数据。 高通滤波器从数字滤波器的输出中去除直流偏移分量; 然后，通过乘法器将其输出乘以缩放增益“A”，从而产生数字输出。 DELTA SIGMA调制器包括串联连接的至少三个开关电容积分器和一位量化器以及单采样延迟电路。 由一位量化器产生的一位输出由单采样延迟电路延迟，其中输出被传送到每个开关电容积分器。 每个开关电容积分器使用由CMOS运算放大器和至少一个幅度限制电路配置的CMOS差分放大器来配置。 限幅电路由两个PMOS晶体管和两个以二极管连接方式并联连接的NMOS晶体管构成; 并且该电路被提供以通过稳定其工作点来限制CMOS差分放大器的输出的幅度。

    Analog-Digital converter using delta sigma modulation digital filtering, and gain-scaling
    2.
    发明授权
    Analog-Digital converter using delta sigma modulation digital filtering, and gain-scaling 失效
    使用Δ-Σ调制，数字滤波和增益调节的模数转换器

    公开(公告)号：US5757299A

    公开(公告)日：1998-05-26

    申请号：US533764

    申请日：1995-09-26

    申请人： Masao Noro ,  Yusuke Yamamoto ,  Toshio Maejima

    发明人： Masao Noro ,  Yusuke Yamamoto ,  Toshio Maejima

    IPC分类号： H03M3/02

    CPC分类号： H03M3/444 ,  H03M3/43

    摘要： An analog-digital converter comprises a .DELTA. .SIGMA. modulator, a digital filter, a high-pass filter and a multiplier which are connected in series. Analog input is converted into serial-bit strings by the .DELTA. .SIGMA. modulator, for which gain `1/A` is set. The digital filter extracts low-frequency components, corresponding to the analog input, from the serial-bit strings, so the low-frequency components are converted into parallel-bit digital data. The high-pass filter removes DC offset component from output of the digital filter; and then, output thereof is multiplied by scaling gain `A` by the multiplier so that digital output is produced. The .DELTA. .SIGMA. modulator comprises at least three switched-capacitor integrators and a one-bit quantizer, which are connected in series, as well as a one-sample delay circuit. One-bit output, produced by the one-bit quantizer, is delayed by the one-sample delay circuit, whose output is delivered to each switched-capacitor integrator. Each switched-capacitor integrator is configured using a CMOS differential amplifier which is configured by a CMOS operational amplifier and at least one amplitude-limiting circuit. The amplitude-limiting circuit is configured by two PMOS transistors and two NMOS transistors which are connected in parallel in a diode-connection manner; and this circuit is provided to limit amplitude in output of the CMOS differential amplifier by stabilizing its operating point.

    摘要翻译： 模数转换器包括串联连接的DELTA SIGMA调制器，数字滤波器，高通滤波器和乘法器。 模拟输入通过DELTA SIGMA调制器转换成串行位串，为其设置增益'1 / A'。 数字滤波器从串行比特串中提取与模拟输入相对应的低频分量，因此低频分量转换为并行位数字数据。 高通滤波器从数字滤波器的输出中去除直流偏移分量; 然后，通过乘法器将其输出乘以缩放增益“A”，从而产生数字输出。 DELTA SIGMA调制器包括串联连接的至少三个开关电容积分器和一位量化器以及单采样延迟电路。 由一位量化器产生的一位输出由单采样延迟电路延迟，其中输出被传送到每个开关电容积分器。 每个开关电容积分器使用由CMOS运算放大器和至少一个幅度限制电路配置的CMOS差分放大器来配置。 限幅电路由两个PMOS晶体管和两个以二极管连接方式并联连接的NMOS晶体管构成; 并且该电路被提供以通过稳定其工作点来限制CMOS差分放大器的输出的幅度。

    Imaging system
    3.
    发明授权
    Imaging system 有权
    成像系统

    公开(公告)号：US08649002B2

    公开(公告)日：2014-02-11

    申请号：US13221484

    申请日：2011-08-30

    申请人： Yusuke Yamamoto

    发明人： Yusuke Yamamoto

    IPC分类号： G01N21/00

    CPC分类号： G01J3/0248 ,  G01J3/0208 ,  G01J3/2803 ,  G02B21/0004 ,  G02B21/367

    摘要： An imaging system may include an optical system that forms an image of light irradiated onto a sample in a predetermined focal plane, an imaging element that includes a pixel array in which a plurality of pixels are arranged in a two-dimensional matrix, each of the pixels detecting at least a part of the light of the image of the sample formed in the focal plane, the imaging element obtaining the image of the sample corresponding to the light detected by the pixel array, a spectrum detecting unit arranged to be adjacent to the pixel array, the spectrum detecting unit detecting a spectrum of the light in the focal plane to output spectrum information, and a correcting unit that corrects the image of the sample obtained by the imaging element based on the spectrum information output from the spectrum detecting unit.

    摘要翻译： 成像系统可以包括形成在预定焦平面中照射到样本上的光的图像的光学系统，包括其中多个像素被布置在二维矩阵中的像素阵列的成像元件， 像素，其检测形成在焦平面中的样本的图像的光的至少一部分，所述成像元件获得与由像素阵列检测到的光相对应的样本的图像;频谱检测单元，被布置为与 像素阵列，频谱检测单元检测焦平面中的光的频谱以输出频谱信息;以及校正单元，其基于从频谱检测单元输出的频谱信息校正由成像元件获得的样本的图像。

    Image forming apparatus having a control section which corrects deviation of a belt
    6.
    发明授权
    Image forming apparatus having a control section which corrects deviation of a belt 有权
    图像形成装置具有校正带的偏差的控制部

    公开(公告)号：US08023870B2

    公开(公告)日：2011-09-20

    申请号：US12335757

    申请日：2008-12-16

    申请人： Chikatsu Suzuki ,  Kenji Taki ,  Fusako Ozawa ,  Yusuke Yamamoto

    发明人： Chikatsu Suzuki ,  Kenji Taki ,  Fusako Ozawa ,  Yusuke Yamamoto

    IPC分类号： G03G15/16

    CPC分类号： G03G15/161 ,  G03G15/1615 ,  G03G2215/00143

    摘要： An image forming apparatus includes: a rotating belt which rotates around a roller; a drive section which rotates the belt; a detection section which detects a position of the belt in a width direction; a moving section which moves the belt in the width direction; a control section which corrects a deviation of the belt by controlling the moving section. The control section conducts a preparatory operation in which the control section changes an amount of control to be given to the moving section under the condition where the belt is rotated to obtain a correction data showing a relation between the amount of control and a change of a position of the belt in the width direction detected by the detection section, stores the correction data in a memory section, and then corrects the deviation based on the correction data stored in the memory section.

    摘要翻译： 图像形成装置包括：围绕辊旋转的旋转带; 旋转皮带的驱动部; 检测部，其检测所述带在宽度方向上的位置; 移动部，其使所述带沿宽度方向移动; 控制部，其通过控制所述移动部来校正所述带的偏差。 所述控制部进行准备动作，在所述准备动作中，所述控制部在所述带旋转的状态下变更对所述移动部的控制量，从而获得表示所述控制量与所述控制的变化之间的关系的校正数据 由检测部检测到的带宽度方向的位置，将校正数据存储在存储部中，然后根据存储在存储部中的校正数据来校正偏差。

    Water-Dispersed Slurry Coating
    8.
    发明申请
    Water-Dispersed Slurry Coating 审中-公开
    水分散浆料涂料

    公开(公告)号：US20080028985A1

    公开(公告)日：2008-02-07

    申请号：US10582628

    申请日：2004-12-10

    申请人： Yasuhiro Shindo ,  Takeshi Furuta ,  Yusuke Yamamoto ,  Kazuyuki Kuwano

    发明人： Yasuhiro Shindo ,  Takeshi Furuta ,  Yusuke Yamamoto ,  Kazuyuki Kuwano

    IPC分类号： C09D175/04

    CPC分类号： C08G18/8077 ,  C08G18/4825 ,  C08G18/6229 ,  C08G18/632 ,  C08G18/8108 ,  C09D5/027 ,  C09D175/04

    摘要： This invention relates to a water-dispersed slurry coating which can provide a film excellent in water resistance and strength.The water-dispersed slurry coating comprises: (A) a particulate comprising (a1) a resin having an active hydrogen; and (B) a reactive surfactant comprising a hydrophilic moiety and a hydrophobic moiety having an aromatic ring-containing hydrocarbon group having 6 to 100 carbon atoms and having at least one group selected from the group consisting of an isocyanate group, a blocked isocyanate group and an epoxy group in the hydrophilic moiety, and having an oxyethylene group in a content of not less than 20% and not more than 97% by weight; and (a2) a curing agent according to need, in aqueous medium.

    摘要翻译： 本发明涉及能提供耐水性和强度优异的膜的水分散浆料涂料。 水分散浆料涂料包括：（A）包含（a1）具有活性氢的树脂的颗粒; 和（B）包含亲水部分和疏水部分的反应性表面活性剂，所述疏水部分具有含有碳原子数为6〜100个的含芳环的烃基，并具有至少一个选自异氰酸酯基，封端异氰酸酯基和 亲水部分中的环氧基，并且具有不小于20重量％且不大于97重量％的氧化乙烯基团; 和（a2）根据需要的固化剂，在水性介质中。