公开(公告)号：US5960308A

公开(公告)日：1999-09-28

申请号：US40370

申请日：1998-03-18

申请人： Masatoshi Akagawa ,  Mitsutoshi Higashi ,  Hajime Iizuka ,  Takehiko Arai

发明人： Masatoshi Akagawa ,  Mitsutoshi Higashi ,  Hajime Iizuka ,  Takehiko Arai

IPC分类号： H01L21/60 ,  H01L23/31 ,  H01L23/485 ,  H01L23/528 ,  H01L23/532 ,  H01L23/552 ,  H01L21/44

CPC分类号： H01L24/12 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/5283 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/552 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/3025

摘要： A process for making a chip sized semiconductor device, in which a semiconductor chip is prepared so as to have electrodes on one of surfaces thereof and an electrically insulating passivation film formed on the one surface except for areas where the electrodes exist. An insulation sheet is prepared so as to have first and second surfaces and a metallic film coated on the first surface. The second surface of the insulation sheet is adhered on the one surface of the semiconductor chip. First via-holes are provided in the metallic film at positions corresponding to the electrodes. Second via-holes are provided in the insulation sheet at positions corresponding to the first via-holes so that the electrodes are exposed. The metallic film is electrically connected to the electrodes of the semiconductor chip through the first and second via-holes. A circuit pattern is formed from the metallic film so that the circuit pattern has external terminal connecting portions. An insulation film is adhered on the insulation sheet so that the external terminal connecting portions are exposed. External connecting terminals are electrically connected to the external terminal connecting portions of the circuit pattern.

摘要翻译： 制造芯片尺寸的半导体器件的方法，其中制备半导体芯片以在其一个表面上具有电极，以及形成在除了存在电极的区域之外的一个表面上的电绝缘钝化膜。 制备绝缘片以具有第一表面和第二表面以及涂覆在第一表面上的金属膜。 绝缘片的第二表面粘附在半导体芯片的一个表面上。 在与电极对应的位置处，在金属膜上设置有第一通路孔。 在绝缘片上设置有与第一通路孔对应的位置露出​​第二通孔。 金属膜通过第一和第二通孔与半导体芯片的电极电连接。 电路图案由金属膜形成，使得电路图案具有外部端子连接部分。 绝缘膜粘附在绝缘片上，使得外部端子连接部分露出。 外部连接端子电连接到电路图案的外部端子连接部分。

公开(公告)号：US5834844A

公开(公告)日：1998-11-10

申请号：US620290

申请日：1996-03-22

申请人： Masatoshi Akagawa ,  Mitsutoshi Higashi ,  Hajime Iizuka ,  Takehiko Arai

发明人： Masatoshi Akagawa ,  Mitsutoshi Higashi ,  Hajime Iizuka ,  Takehiko Arai

IPC分类号： H01L21/60 ,  H01L23/31 ,  H01L23/485 ,  H01L23/528 ,  H01L23/532 ,  H01L23/552 ,  H01L23/10 ,  H01L23/02 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L24/12 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/5283 ,  H01L23/5329 ,  H01L23/53295 ,  H01L23/552 ,  H01L24/02 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/1134 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/19041 ,  H01L2924/3025

摘要： A process for making a chip sized semiconductor device, in which a semiconductor chip is prepared so as to have electrodes on one of surfaces thereof and an electrically insulating passivation film formed on the one surface except for areas where the electrodes exist. An insulation sheet is prepared so as to have first and second surfaces and a metallic film coated on the first surface. The second surface of the insulation sheet is adhered on the one surface of the semiconductor chip. First via-holes are provided in the metallic film at positions corresponding to the electrodes. Second via-holes are provided in the insulation sheet at positions corresponding to the first via-holes so that the electrodes are exposed. The metallic film is electrically connected to the electrodes of the semiconductor chip through the first and second via-holes. A circuit pattern is formed from the metallic film so that the circuit pattern has external terminal connecting portions. An insulation film is adhered on the insulation sheet so that the external terminal connecting portions are exposed. External connecting terminals are electrically connected to the external terminal connecting portions of the circuit pattern.

摘要翻译： 制造芯片尺寸的半导体器件的方法，其中制备半导体芯片以在其一个表面上具有电极，以及形成在除了存在电极的区域之外的一个表面上的电绝缘钝化膜。 制备绝缘片以具有第一表面和第二表面以及涂覆在第一表面上的金属膜。 绝缘片的第二表面粘附在半导体芯片的一个表面上。 在与电极对应的位置处，在金属膜上设置有第一通路孔。 在绝缘片上设置有与第一通路孔对应的位置露出​​第二通孔。 金属膜通过第一和第二通孔与半导体芯片的电极电连接。 电路图案由金属膜形成，使得电路图案具有外部端子连接部分。 绝缘膜粘附在绝缘片上，使得外部端子连接部分露出。 外部连接端子电连接到电路图案的外部端子连接部分。

公开(公告)号：US5777386A

公开(公告)日：1998-07-07

申请号：US698624

申请日：1996-08-16

申请人： Mitsutoshi Higashi ,  Hajime Iizuka ,  Kei Murayama

发明人： Mitsutoshi Higashi ,  Hajime Iizuka ,  Kei Murayama

IPC分类号： H01L21/60 ,  H01L21/56 ,  H01L23/12 ,  H01L23/13 ,  H01L23/28 ,  H01L23/498 ,  H05K1/02 ,  H05K3/30 ,  H05K3/34 ,  H01L23/48

CPC分类号： H01L21/563 ,  H01L23/13 ,  H01L23/49816 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/1532 ,  H05K1/0201 ,  H05K3/303 ,  H05K3/3436

摘要： A semiconductor device includes a semiconductor element having first and second surfaces. The element has connecting terminals on the first surface. A substrate has a substrate surface on which external connecting terminals and conductive patterns are formed. The connecting terminals of the semiconductor element are electrically connected to the external connecting terminals by means of the conductive patterns. The connecting terminals of the semiconductor element are each connected to one end of respective ones of the conductive patterns of the substrate by a flip-chip bonding. Resin hermetically seals the connecting terminals of the semiconductor element, so that the second surface of the semiconductor element is not covered by the sealing resin. A mounting substrate has a surface provided with circuit patterns. The semiconductor device is mounted on the mounting substrate in such a manner that the external connecting terminals are electrically connected to the circuit patterns of the mounting substrate and the second surface of the semiconductor element comes into contact with the surface of the mounting substrate.

摘要翻译： 半导体器件包括具有第一和第二表面的半导体元件。 元件在第一表面具有连接端子。 衬底具有其上形成有外部连接端子和导电图案的衬底表面。 半导体元件的连接端子通过导电图案与外部连接端子电连接。 半导体元件的连接端子通过倒装芯片接合分别连接到基板的相应导电图案的一端。 树脂密封半导体元件的连接端子，使得半导体元件的第二表面不被密封树脂​​覆盖。 安装基板具有设置有电路图案的表面。 半导体器件以这样的方式安装在安装基板上，使得外部连接端子电连接到安装基板的电路图案，并且半导体元件的第二表面与安装基板的表面接触。

公开(公告)号：US07989707B2

公开(公告)日：2011-08-02

申请号：US11815580

申请日：2006-12-12

申请人： Takaharu Yamano ,  Hajime Iizuka ,  Hideaki Sakaguchi ,  Toshio Kobayashi ,  Tadashi Arai ,  Tsuyoshi Kobayashi ,  Tetsuya Koyama ,  Kiyoaki Iida ,  Tomoaki Mashima ,  Koichi Tanaka ,  Yuji Kunimoto ,  Takashi Yanagisawa

发明人： Takaharu Yamano ,  Hajime Iizuka ,  Hideaki Sakaguchi ,  Toshio Kobayashi ,  Tadashi Arai ,  Tsuyoshi Kobayashi ,  Tetsuya Koyama ,  Kiyoaki Iida ,  Tomoaki Mashima ,  Koichi Tanaka ,  Yuji Kunimoto ,  Takashi Yanagisawa

IPC分类号： H05K1/16

CPC分类号： H01L23/5389 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/563 ,  H01L21/565 ,  H01L21/6835 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/552 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L25/162 ,  H01L2221/68345 ,  H01L2224/0401 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83101 ,  H01L2224/83102 ,  H01L2224/83192 ,  H01L2224/85 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00011 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/01002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/207 ,  H01L2924/3025 ,  H01L2924/3511 ,  H05K1/185 ,  H05K1/186 ,  H05K3/20 ,  H05K3/4614 ,  H05K3/462 ,  H05K3/4644 ,  H05K2201/10007 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y10T29/4913 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00

摘要： A method of producing a chip embedded substrate is disclosed. This method comprises a first step of mounting a semiconductor chip on a first substrate on which a first wiring is formed; and a second step of joining the first substrate with a second substrate on which a second wiring is formed. In the second step, the semiconductor chip is encapsulated between the first substrate and the second substrate and electrical connection is made between the first wiring and the second wiring so as to form multilayered wirings connected to the semiconductor chip.

摘要翻译： 公开了一种制造芯片嵌入式基板的方法。 该方法包括将半导体芯片安装在其上形成有第一布线的第一基板上的第一步骤; 以及将第一基板与形成有第二布线的第二基板接合的第二步骤。 在第二步骤中，将半导体芯片封装在第一基板和第二基板之间，并且在第一布线和第二布线之间形成电连接，以形成连接到半导体芯片的多层布线。

公开(公告)号：US5538985A

公开(公告)日：1996-07-23

申请号：US377236

申请日：1995-01-24

申请人： Hajime Iizuka ,  Takahisa Oguchi ,  Yoji Aoki ,  Norio Ohto ,  Kazutoshi Horikomi ,  Takaichi Miwa ,  Takeshi Kamioka ,  Shoji Kawashima

发明人： Hajime Iizuka ,  Takahisa Oguchi ,  Yoji Aoki ,  Norio Ohto ,  Kazutoshi Horikomi ,  Takaichi Miwa ,  Takeshi Kamioka ,  Shoji Kawashima

IPC分类号： C07D207/26 ,  C07D401/06 ,  A61K31/395 ,  C07D403/02

CPC分类号： C07D207/26 ,  C07D401/06

摘要： Antipsychotics and ischemic cerebral disease therapeutics comprising as an effective ingredient a compound represented by the following formula (1) or (2): ##STR1## or a salt thereof. These drugs do not induce extrapyramidal side effects.

摘要翻译： 抗精神病药和缺血性脑病治疗剂，其包含作为有效成分的由下式（1）或（2）表示的化合物或其盐。 这些药物不会引起锥体外系的副作用。

公开(公告)号：US5198942A

公开(公告)日：1993-03-30

申请号：US520085

申请日：1990-05-07

申请人： Hajime Iizuka ,  Zenjiro Uchida

发明人： Hajime Iizuka ,  Zenjiro Uchida

IPC分类号： G06F3/06 ,  G11B5/54 ,  G11B19/04 ,  G11B21/12 ,  G11B33/12

CPC分类号： G11B33/121 ,  G11B19/04 ,  G11B5/54

摘要： A disc drive control device maintains power to its circuits after a manual power source switch is opened for a time sufficient to assure that the read/write head of a hard disc drive is moved to its shipping zone. This is accomplished with a bypass device for maintaining power to the hard disc drive until the head is properly stowed in its shipping position after the operator turns off the power switch. Further, a detecting circuit prevents the disc drive from hanging up when the operator turns power on again before the head movement is completed. A timer turns off the power bypass device a short time after the power source switch is turned off, if, for any reason, the power bypass fails to be shut down as a normal result of the completed movement of the read/write head to the shipping position.

公开(公告)号：US4965263A

公开(公告)日：1990-10-23

申请号：US310505

申请日：1989-02-14

申请人： Takashi Nishina ,  Joji Kamiya ,  Yasuhito Tanaka ,  Tsutomu Katakami ,  Nobuyuki Fukazawa ,  Hajime Iizuka ,  Takuo Nakano

发明人： Takashi Nishina ,  Joji Kamiya ,  Yasuhito Tanaka ,  Tsutomu Katakami ,  Nobuyuki Fukazawa ,  Hajime Iizuka ,  Takuo Nakano

IPC分类号： C07D237/04 ,  C07D401/12 ,  C07D403/12 ,  C07D405/12 ,  C07D409/12

CPC分类号： C07D401/12 ,  C07D237/04 ,  C07D403/12 ,  C07D405/12 ,  C07D409/12

摘要： This invention relates to pyridazinone derivatives of the general formula: ##STR1## [wherein R.sup.1 stands for a hydrogen atom or a lower alkyl group; R.sup.2 for a hydrogen atom or a lower alkyl group; and A for (i) a ring selected from a benzene ring, a furan ring, a thiophene ring and a pyridine ring (on which ring 1-3 substituents or atoms selected from amino groups, nitro groups, lower alkanoylamino groups, hydroxyl groups, lower alkanoyloxy groups, sulfamoyl groups and halogen atoms may be present), or (ii) a grouping of the formula: ##STR2## (wherein R.sup.3 stands for a hydrogen atom, a lower alkyl group, a phenyl(lower)alkyl, a hydroxyphenyl(lower)alkyl group, a lower alkylmercapto(lower)alkyl group, a benzylmercapto(lower)alkyl group, a guanidino(lower)alkyl group, a nitroguanidino(lower)alkyl group, an indolyl(lower)alkyl group, a carbamoyl(lower)alkyl group or a carboxy(lower)alkyl group, R.sup.4 for a hydrogen atom or a lower alkyl group, R.sup.5 for a hydrogen atom, a lower alkyl group, a lower alkanoyl group, a benzoyl or a benzyloxycarbonyl group, and R.sup.3 and R.sup.4 may be combined to form a grouping of the formula: ##STR3## which forms a ring), or (iii) a grouping of the formula: ##STR4## (wherein R.sup.6, R.sup.7 and R.sup.8 each stand for a hydrogen atom or a lower alkyl group, B is an oxygen atom or a sulfur atom, R.sup.9 stands for a hydrogen atom or a lower alkanoyl group, and n is 0 or 1)].

公开(公告)号：US08736053B2

公开(公告)日：2014-05-27

申请号：US13526821

申请日：2012-06-19

申请人： Koichi Tanaka ,  Nobuyuki Kurashima ,  Hajime Iizuka ,  Tetsuya Koyama

发明人： Koichi Tanaka ,  Nobuyuki Kurashima ,  Hajime Iizuka ,  Tetsuya Koyama

IPC分类号： H01L23/48

CPC分类号： H01L23/49816 ,  H01L21/4853 ,  H01L21/568 ,  H01L23/3135 ,  H01L25/105 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511

摘要： A circuit substrate having a mounting surface on which a semiconductor chip is mounted and at least one connection pad formed on the mounting surface is connected to a support plate having at least one mounting portion with a diameter larger than a diameter of the connection pad, through a truncated-cone-shaped solder layer which is formed from at least one solder ball on the basis of a difference between the diameter of the mounting portion and the diameter of the connection pad.

摘要翻译： 具有安装有半导体芯片的安装面的电路基板和形成在安装面上的至少一个连接焊盘连接到具有至少一个直径大于连接焊盘直径的安装部分的支撑板上，通过 基于安装部分的直径和连接焊盘的直径之间的差异，由至少一个焊球形成的截锥形焊料层。

公开(公告)号：US07884484B2

公开(公告)日：2011-02-08

申请号：US11372916

申请日：2006-03-10

申请人： Takaharu Yamano ,  Masahiro Sunohara ,  Hajime Iizuka ,  Tetsuya Koyama

发明人： Takaharu Yamano ,  Masahiro Sunohara ,  Hajime Iizuka ,  Tetsuya Koyama

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/5383 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/18 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/81 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/136 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00011 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/3511 ,  H01L2924/381 ,  H05K1/185 ,  H05K3/4644 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49135 ,  Y10T29/49155 ,  Y10T29/49156 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/0401

摘要： A wiring board includes an insulating layer in which a semiconductor chip is embedded, and a wiring structure connected to the semiconductor chip. A reinforcing member reinforcing the insulating layer is embedded in the insulating layer. This enables reduction in a thickness of the wiring board and a suppression of warpage of the wiring board.

摘要翻译： 布线基板包括嵌入有半导体芯片的绝缘层和与半导体芯片连接的布线结构。 加强绝缘层的加强构件嵌入在绝缘层中。 这样可以减少布线板的厚度和抑制布线板的翘曲。

公开(公告)号：US07587727B2

公开(公告)日：2009-09-08

申请号：US11100920

申请日：2005-04-07

申请人： Hajime Iizuka ,  Yasuhito Kojima ,  Koichi Takezawa

发明人： Hajime Iizuka ,  Yasuhito Kojima ,  Koichi Takezawa

IPC分类号： G11B17/03

CPC分类号： G11B7/12 ,  G11B7/08582 ,  G11B2007/0006 ,  H05K1/0218 ,  H05K1/189 ,  H05K2201/055

摘要： A pickup device comprises a flexible circuit member including a main circuit portion on which electric or electronic components are mounted and a sub-circuit portion connected to the main circuit portion. The pickup device further comprises a housing on which the flexible circuit member is mounted. Each of the main circuit portion and the sub-circuit portion has a single-sided structure and includes a ground portion. The sub-circuit portion is folded with respect to the main circuit portion. The flexible circuit member is mounted on the housing while the main circuit portion and the sub-circuit portion are held in an overlapping arrangement. With this arrangement, S/N ratio of electric signals can be improved while achieving cost reduction.

摘要翻译： 拾取装置包括柔性电路构件，该柔性电路构件包括安装有电子或电子部件的主电路部分和连接到主电路部分的子电路部分。 拾取装置还包括其上安装有柔性电路构件的壳体。 主电路部分和子电路部分中的每一个具有单面结构并且包括接地部分。 副电路部分相对于主电路部折叠。 柔性电路部件安装在壳体上，而主电路部分和副电路部分保持重叠的布置。 通过这种布置，可以提高电信号的S / N比，同时实现成本降低。