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公开(公告)号:US10930324B2
公开(公告)日:2021-02-23
申请号:US16877133
申请日:2020-05-18
Applicant: Micron Technology, Inc.
Inventor: Mahdi Jamali , William A. Melton , Daniele Vimercati , Xinwei Guo , Yasuko Hattori
IPC: G11C7/06 , G11C7/08 , G11C11/4091 , G11C11/22
Abstract: Methods, systems, and devices for self-referencing sensing schemes with coupling capacitance are described. A sense component of a memory device may include a capacitive coupling between two nodes of the sense component. The capacitive coupling may, in some examples, be provided by a capacitive element of the sense component or an intrinsic capacitance between features of the sense component. An example of a method employing such a sense component for detecting a logic state stored by a memory cell may include generating a first sense signal at one of the nodes while the node is coupled with the memory cell, and generating a second sense signal at the other of the nodes while the other node is coupled with the memory cell. The sense signals may be based at least in part on the capacitive coupling between the two nodes.
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公开(公告)号:US20190244641A1
公开(公告)日:2019-08-08
申请号:US15892118
申请日:2018-02-08
Applicant: Micron Technology, Inc.
Inventor: Mahdi Jamali , William A. Melton , Daniele Vimercati , Xinwei Guo , Yasuko Hattori
IPC: G11C7/06
CPC classification number: G11C7/065
Abstract: Methods, systems, and devices for self-referencing sensing schemes with coupling capacitance are described. A sense component of a memory device may include a capacitive coupling between two nodes of the sense component. The capacitive coupling may, in some examples, be provided by a capacitive element of the sense component or an intrinsic capacitance between features of the sense component. An example of a method employing such a sense component for detecting a logic state stored by a memory cell may include generating a first sense signal at one of the nodes while the node is coupled with the memory cell, and generating a second sense signal at the other of the nodes while the other node is coupled with the memory cell. The sense signals may be based at least in part on the capacitive coupling between the two nodes.
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公开(公告)号:US10395697B1
公开(公告)日:2019-08-27
申请号:US15892118
申请日:2018-02-08
Applicant: Micron Technology, Inc.
Inventor: Mahdi Jamali , William A. Melton , Daniele Vimercati , Xinwei Guo , Yasuko Hattori
IPC: G11C7/06
Abstract: Methods, systems, and devices for self-referencing sensing schemes with coupling capacitance are described. A sense component of a memory device may include a capacitive coupling between two nodes of the sense component. The capacitive coupling may, in some examples, be provided by a capacitive element of the sense component or an intrinsic capacitance between features of the sense component. An example of a method employing such a sense component for detecting a logic state stored by a memory cell may include generating a first sense signal at one of the nodes while the node is coupled with the memory cell, and generating a second sense signal at the other of the nodes while the other node is coupled with the memory cell. The sense signals may be based at least in part on the capacitive coupling between the two nodes.
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公开(公告)号:US10388353B1
公开(公告)日:2019-08-20
申请号:US15923700
申请日:2018-03-16
Applicant: Micron Technology, Inc.
Inventor: Yasuko Hattori , Mahdi Jamali
IPC: G11C11/22 , H01L27/11514 , G11C11/56
Abstract: A memory device may include a digit line, a ferroelectric memory cell coupled with the digit line, a first capacitor including a first node and a second node, the first node coupled with the digit line using a first path and the second node coupled with the digit line using a second path different from the first path, and a switching component positioned in the second path and coupled with the second node of the first capacitor and the digit line. The switching component may selectively couple the second node of the first capacitor with the digit line. In some cases, the memory device may also include a second capacitor coupled with the digit line and the second node of the first capacitor.
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公开(公告)号:US11380381B2
公开(公告)日:2022-07-05
申请号:US17108801
申请日:2020-12-01
Applicant: Micron Technology, Inc.
Inventor: Yasuko Hattori , Mahdi Jamali
IPC: G11C11/22 , H01L27/11514 , G11C11/56
Abstract: A memory device may include a digit line, a ferroelectric memory cell coupled with the digit line, a first capacitor including a first node and a second node, the first node coupled with the digit line using a first path and the second node coupled with the digit line using a second path different from the first path, and a switching component positioned in the second path and coupled with the second node of the first capacitor and the digit line, the switching component configured to selectively couple the second node of the first capacitor with the digit line. In some cases, the memory device may further include a second capacitor coupled with the digit line and the second node of the first capacitor.
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公开(公告)号:US20210151090A1
公开(公告)日:2021-05-20
申请号:US17108801
申请日:2020-12-01
Applicant: Micron Technology, Inc.
Inventor: Yasuko Hattori , Mahdi Jamali
IPC: G11C11/22 , H01L27/11514
Abstract: Methods, systems, and devices for canceling memory cell variations are described. A memory device may include a digit line, a ferroelectric memory cell coupled with the digit line, a first capacitor including a first node and a second node, the first node coupled with the digit line using a first path and the second node coupled with the digit line using a second path different from the first path, and a switching component positioned in the second path and coupled with the second node of the first capacitor and the digit line, the switching component configured to selectively couple the second node of the first capacitor with the digit line. In some cases, the memory device may further include a second capacitor coupled with the digit line and the second node of the first capacitor.
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公开(公告)号:US20190341094A1
公开(公告)日:2019-11-07
申请号:US16420098
申请日:2019-05-22
Applicant: Micron Technology, Inc.
Inventor: Yasuko Hattori , Mahdi Jamali
IPC: G11C11/22 , H01L27/11514
Abstract: Methods, systems, and devices for canceling memory cell variations are described. A memory device may include a digit line, a ferroelectric memory cell coupled with the digit line, a first capacitor including a first node and a second node, the first node coupled with the digit line using a first path and the second node coupled with the digit line using a second path different from the first path, and a switching component positioned in the second path and coupled with the second node of the first capacitor and the digit line, the switching component configured to selectively couple the second node of the first capacitor with the digit line. In some cases, the memory device may further include a second capacitor coupled with the digit line and the second node of the first capacitor.
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公开(公告)号:US20200152243A1
公开(公告)日:2020-05-14
申请号:US16746613
申请日:2020-01-17
Applicant: Micron Technology, Inc.
Inventor: Mahdi Jamali , William A. Melton , Daniele Vimercati , Xinwei Guo , Yasuko Hattori
IPC: G11C7/06 , G11C11/22 , G11C11/4091 , G11C7/08
Abstract: Methods, systems, and devices for self-referencing sensing schemes with coupling capacitance are described. A sense component of a memory device may include a capacitive coupling between two nodes of the sense component. The capacitive coupling may, in some examples, be provided by a capacitive element of the sense component or an intrinsic capacitance between features of the sense component. An example of a method employing such a sense component for detecting a logic state stored by a memory cell may include generating a first sense signal at one of the nodes while the node is coupled with the memory cell, and generating a second sense signal at the other of the nodes while the other node is coupled with the memory cell. The sense signals may be based at least in part on the capacitive coupling between the two nodes.
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公开(公告)号:US10573355B2
公开(公告)日:2020-02-25
申请号:US16512963
申请日:2019-07-16
Applicant: Micron Technology, Inc.
Inventor: Mahdi Jamali , William A. Melton , Daniele Vimercati , Xinwei Guo , Yasuko Hattori
IPC: G11C7/06
Abstract: Methods, systems, and devices for self-referencing sensing schemes with coupling capacitance are described. A sense component of a memory device may include a capacitive coupling between two nodes of the sense component. The capacitive coupling may, in some examples, be provided by a capacitive element of the sense component or an intrinsic capacitance between features of the sense component. An example of a method employing such a sense component for detecting a logic state stored by a memory cell may include generating a first sense signal at one of the nodes while the node is coupled with the memory cell, and generating a second sense signal at the other of the nodes while the other node is coupled with the memory cell. The sense signals may be based at least in part on the capacitive coupling between the two nodes.
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公开(公告)号:US20200279590A1
公开(公告)日:2020-09-03
申请号:US16877133
申请日:2020-05-18
Applicant: Micron Technology, Inc
Inventor: Mahdi Jamali , William A. Melton , Daniele Vimercati , Xinwei Guo , Yasuko Hattori
IPC: G11C7/06 , G11C7/08 , G11C11/4091 , G11C11/22
Abstract: Methods, systems, and devices for self-referencing sensing schemes with coupling capacitance are described. A sense component of a memory device may include a capacitive coupling between two nodes of the sense component. The capacitive coupling may, in some examples, be provided by a capacitive element of the sense component or an intrinsic capacitance between features of the sense component. An example of a method employing such a sense component for detecting a logic state stored by a memory cell may include generating a first sense signal at one of the nodes while the node is coupled with the memory cell, and generating a second sense signal at the other of the nodes while the other node is coupled with the memory cell. The sense signals may be based at least in part on the capacitive coupling between the two nodes.
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