公开(公告)号：US20180121356A1

公开(公告)日：2018-05-03

申请号：US15857435

申请日：2017-12-28

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi ,  Chee Weng Tan ,  Sebastien LeMarie ,  Andre Klindworth

IPC: G06F12/0804

CPC classification number: G06F12/0804 ,  G06F12/0891 ,  G06F13/00 ,  G06F13/1673 ,  G06F13/1694 ,  G06F2212/1024

Abstract: Apparatuses and methods for providing data to a configurable storage area are described herein. An example apparatus may include an extended address register including a plurality of configuration bits indicative of an offset and a size, an array having a storage area, a size and offset of the storage area based, at least in part, on the plurality of configuration bits, and a buffer configured to store data, the data including data intended to be stored in the storage area. A memory control unit may be coupled to the buffer and configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.

公开(公告)号：US10860482B2

公开(公告)日：2020-12-08

申请号：US16272945

申请日：2019-02-11

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi ,  Chee Weng Tan ,  Sebastien LeMarie ,  Andre Klindworth

IPC: G06F12/0804 ,  G06F12/0891 ,  G06F13/16 ,  G06F13/00

Abstract: Apparatuses and methods for providing data to a configurable storage area are described herein. An example apparatus may include an extended address register including a plurality of configuration bits indicative of an offset and a size, an array having a storage area, a size and offset of the storage area based, at least in part, on the plurality of configuration bits, and a buffer configured to store data, the data including data intended to be stored in the storage area. A memory control unit may be coupled to the buffer and configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.

公开(公告)号：US10223263B2

公开(公告)日：2019-03-05

申请号：US15857435

申请日：2017-12-28

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi ,  Chee Weng Tan ,  Sebastien LeMarie ,  Andre Klindworth

IPC: G06F12/08 ,  G06F13/16 ,  G06F13/00 ,  G06F12/0804 ,  G06F12/0891

Abstract: Apparatuses and methods for providing data to a configurable storage area are described herein. An example apparatus may include an extended address register including a plurality of configuration bits indicative of an offset and a size, an array having a storage area, a size and offset of the storage area based, at least in part, on the plurality of configuration bits, and a buffer configured to store data, the data including data intended to be stored in the storage area. A memory control unit may be coupled to the buffer and configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.

公开(公告)号：US20170083263A1

公开(公告)日：2017-03-23

申请号：US15367631

申请日：2016-12-02

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi

IPC: G06F3/06 ,  G06F12/0891 ,  G06F12/0804

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0673 ,  G06F12/0804 ,  G06F12/0891 ,  G06F2212/7203

Abstract: Apparatuses and methods for providing data from a buffer are disclosed herein. An example apparatus may include an array, a buffer, and a memory control unit. The buffer may be coupled to the array and configured to store data. The memory control unit may be coupled to the array and the buffer. The memory control unit may be configured to cause the buffer to store the data responsive, at least in part, to a first write command and may further be configured to cause the buffer to store the data in the array responsive, at least in part, to a flush command. The memory control unit may further be configured to interrupt the flush command to prepare for a read command or a second write command and resume the flush command once the read command or the second write command is performed.

公开(公告)号：US09563565B2

公开(公告)日：2017-02-07

申请号：US13967250

申请日：2013-08-14

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi

IPC: G06F12/08

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0673 ,  G06F12/0804 ,  G06F12/0891 ,  G06F2212/7203

Abstract: Apparatuses and methods for providing data from a buffer are disclosed herein. An example apparatus may include an array, a buffer, and a memory control unit. The buffer may be coupled to the array and configured to store data. The data may include data intended to be stored in the storage area. The memory control unit may be coupled to the array and the buffer. The memory control unit may be configured to cause the buffer to store the data responsive, at least in part, to a write command and may further be configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.

Abstract translation: 本文公开了用于从缓冲器提供数据的装置和方法。 示例性装置可以包括阵列，缓冲器和存储器控制单元。 缓冲器可以耦合到阵列并被配置为存储数据。 数据可以包括要存储在存储区域中的数据。 存储器控制单元可以耦合到阵列和缓冲器。 存储器控制单元可以被配置为使得缓冲器至少部分地响应于写入命令来存储数据，并且还可以被配置为使得缓冲器将要存储在存储区域中的数据存储在存储器 阵列的区域至少部分响应于冲洗命令。

公开(公告)号：US20150347038A1

公开(公告)日：2015-12-03

申请号：US14288663

申请日：2014-05-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Domenico Monteleone ,  Giacomo Bernardi ,  Luca Porzio ,  Graziano Mirichigni ,  Stefano Zanardi ,  Erminio Di Martino

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0616 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/1036 ,  G06F2212/152 ,  G06F2212/2022 ,  G06F2212/7211

Abstract: Apparatuses and methods for commands to perform wear leveling operations are described herein. An example apparatus may include a memory configured to receive a wear leveling command and to perform a wear leveling operation responsive to the wear leveling command. The memory may further be configured to recommend a wear leveling command be provided to the memory responsive to a global write count exceeding a threshold. The global write count may be indicative of a number of write operations performed by the memory since the memory performed a wear leveling operation.

Abstract translation: 本文描述了用于执行磨损均衡操作的命令的装置和方法。 示例性装置可以包括被配置为接收磨损均衡指令并且响应于磨损均衡指令执行磨损均衡操作的存储器。 存储器还可以被配置为响应于超过阈值的全局写入数量来推荐向存储器提供损耗均衡命令。 全局写入计数可以指示存储器执行的写入操作的数量，因为存储器执行了磨损均衡操作。

公开(公告)号：US09928171B2

公开(公告)日：2018-03-27

申请号：US15637961

申请日：2017-06-29

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi ,  Chee Weng Tan ,  Sebastien LeMarie ,  Andre Klindworth

IPC: G06F13/00 ,  G06F13/16 ,  G06F12/08 ,  G06F12/0804 ,  G06F12/0891

CPC classification number: G06F12/0804 ,  G06F12/0891 ,  G06F13/00 ,  G06F13/1673 ,  G06F13/1694 ,  G06F2212/1024

Abstract: Apparatuses and methods for providing data to a configurable storage area are disclosed herein. An example apparatus may include an extended address register including a plurality of configuration bits indicative of an offset and a size, an array having a storage area, a size and offset of the storage area based, at least in part, on the plurality of configuration bits, and a buffer configured to store data, the data including data intended to be stored in the storage area. A memory control unit may be coupled to the buffer and configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.

公开(公告)号：US10365835B2

公开(公告)日：2019-07-30

申请号：US14288663

申请日：2014-05-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Domenico Monteleone ,  Giacomo Bernardi ,  Luca Porzio ,  Graziano Mirichigni ,  Stefano Zanardi ,  Erminio Di Martino

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02

Abstract: Apparatuses and methods for commands to perform wear leveling operations are described herein. An example apparatus may include a memory configured to receive a wear leveling command and to perform a wear leveling operation responsive to the wear leveling command. The memory may further be configured to recommend a wear leveling command be provided to the memory responsive to a global write count exceeding a threshold. The global write count may be indicative of a number of write operations performed by the memory since the memory performed a wear leveling operation.

公开(公告)号：US20170300413A1

公开(公告)日：2017-10-19

申请号：US15637961

申请日：2017-06-29

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi ,  Chee Weng Tan ,  Sebastien LeMarie ,  Andre Klindworth

IPC: G06F12/08

CPC classification number: G06F12/0804 ,  G06F12/0891 ,  G06F13/00 ,  G06F13/1673 ,  G06F13/1694 ,  G06F2212/1024

Abstract: Apparatuses and methods for providing data to a configurable storage area are disclosed herein. An example apparatus may include an extended address register including a plurality of configuration bits indicative of an offset and a size, an array having a storage area, a size and offset of the storage area based, at least in part, on the plurality of configuration bits, and a buffer configured to store data, the data including data intended to be stored in the storage area. A memory control unit may be coupled to the buffer and configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.

公开(公告)号：US09727493B2

公开(公告)日：2017-08-08

申请号：US13967206

申请日：2013-08-14

Applicant: Micron Technology, Inc.

Inventor： Graziano Mirichigni ,  Luca Porzio ,  Erminio Di Martino ,  Giacomo Bernardi ,  Domenico Monteleone ,  Stefano Zanardi ,  Chee Weng Tan ,  Sebastien LeMarie ,  Andre Klindworth

IPC: G06F13/00 ,  G06F13/16 ,  G06F12/08 ,  G06F12/0891

CPC classification number: G06F12/0804 ,  G06F12/0891 ,  G06F13/00 ,  G06F13/1673 ,  G06F13/1694 ,  G06F2212/1024

Abstract: Apparatuses and methods for providing data to a configurable storage area are disclosed herein. An example apparatus may include an extended address register including a plurality of configuration bits indicative of an offset and a size, an array having a storage area, a size and offset of the storage area based, at least in part, on the plurality of configuration bits, and a buffer configured to store data, the data including data intended to be stored in the storage area. A memory control unit may be coupled to the buffer and configured to cause the buffer to store the data intended to be stored in the storage area in the storage area of the array responsive, at least in part, to a flush command.