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11 条记录 (耗时 0.031 秒)

    POWER SUPPLY CIRCUIT INCLUDING VOLTAGE REGULATOR AND HEADPHONE DRIVING CIRCUIT EMPLOYING THE SAME
    3.
    发明申请
    POWER SUPPLY CIRCUIT INCLUDING VOLTAGE REGULATOR AND HEADPHONE DRIVING CIRCUIT EMPLOYING THE SAME 有权
    包括电压调节器和使用其的耳机驱动电路的电源电路

    公开(公告)号：US20110222702A1

    公开(公告)日：2011-09-15

    申请号：US13041781

    申请日：2011-03-07

    申请人： Yeongha CHOI ,  Jin Ho OH ,  Min Soo KIM ,  Jae-Hee WON

    发明人： Yeongha CHOI ,  Jin Ho OH ,  Min Soo KIM ,  Jae-Hee WON

    IPC分类号： H04R1/10 ,  G05F1/10

    CPC分类号： H03F1/30 ,  H03F2200/03 ,  H03F2200/78

    摘要： A power supply circuit including a voltage regulator and a headphone driving circuit employing the same are disclosed. In accordance with the present invention, the power supply circuit may provide stable power supply to the amplifier since the power supply circuit generates the constant voltage +Vreg and the constant voltage −Vreg from +VDD robust to stronger than a power noise, and the balanced signal path for isolating the noise of the input signal to be amplified is not required, thereby simplifying the constitution of the circuit

    摘要翻译： 公开了一种包括电压调节器和采用其的耳机驱动电路的电源电路。 根据本发明，电源电路可以向放大器提供稳定的电源，因为电源电路产生恒定电压+ Vreg，并且恒定电压-Vreg从+ VDD鲁棒到强于功率噪声，并且平衡 不需要用于隔离要放大的输入信号的噪声的信号路径，从而简化了电路的结构

    LINEAR-TIME TOP-K SORT METHOD
    5.
    发明申请
    LINEAR-TIME TOP-K SORT METHOD 有权
    线性时间TOP-K排序方法

    公开(公告)号：US20120271838A1

    公开(公告)日：2012-10-25

    申请号：US13304800

    申请日：2011-11-28

    申请人： Kyu-Young WHANG ,  Min Soo KIM ,  Jeong-Hoon LEE

    发明人： Kyu-Young WHANG ,  Min Soo KIM ,  Jeong-Hoon LEE

    IPC分类号： G06F17/30

    CPC分类号： G06F7/22

    摘要： The present invention relates to an algorithm that retrieves only k data elements having the largest (or smallest) key values from a dataset (i.e., top-k results) in a time linearly proportional to the size of the dataset. The proposed method using the algorithm finds the top-k results using a k-sized min (or max) heap structure that maintains candidate elements of the top-k results by scanning all data elements in the dataset only once. In other words, the present invention provides a linear-time top-k sort method that finds top-k results in a time linearly proportional to the size of the dataset (i.e., O(n) time complexity), while conventional sort algorithms for finding top-k results cannot find the top-k results in a time linearly proportional to the size of the dataset (i.e., at least O(n log n) time complexity).

    摘要翻译： 本发明涉及在与数据集的大小成线性比例的时间内从数据集中检索具有最大（或最小）密钥值的k个数据元素（即，top-k结果）的算法。 使用该算法的所提出的方法使用k尺寸的最小（或最大）堆结构找到top-k结果，其通过仅扫描数据集中的所有数据元素一次来维护顶部k结果的候选元素。 换句话说，本发明提供一种线性时间top-k分类方法，其以与数据集的大小成线性比例的时间（即，O（n）时间复杂度）来找到top-k结果，而传统的排序算法 找到top-k结果不能在与数据集的大小成线性比例的时间内找到top-k结果（即，至少O（n log n）时间复杂度）。

    MOBILE PHONE FIXING STAND FOR SELFIES
    6.
    发明申请
    MOBILE PHONE FIXING STAND FOR SELFIES 有权

    公开(公告)号：US20230072993A1

    公开(公告)日：2023-03-09

    申请号：US17801137

    申请日：2020-12-21

    申请人： Min Soo KIM

    发明人： Min Soo KIM

    IPC分类号： G03B17/56 ,  H04M1/04

    摘要： The present invention relates to a mobile phone fixing stand for selfies, the mobile phone fixing sand comprising: a body (10) having a spiral spring mounted therein; a head (20) connected to the front surface of the body (10) by a ball joint; a fixing band (40) which is connected to the spiral spring and can be inserted into and withdrawn from the inside of the body (10) via the side surface of the body (10); an upper fixing band (40-1) which has one end fixed to the upper side of the front surface of the body (10) and another end connected to an end portion of the fixing band (40); and a lower fixing band (40-2) which has one end fixed to the lower side of the front surface of the body (10) and another end connected to the end portion of the fixing band (40). The upper fixing band (40-1) and the lower fixing band (40-2) pull and support the upper side and the lower side of the body (10), respectively, thereby fixing the body (10) to a structure.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20130049095A1

    公开(公告)日：2013-02-28

    申请号：US13599680

    申请日：2012-08-30

    申请人： Sung Jin WHANG ,  Dong Sun SHEEN ,  Seung Ho PYI ,  Min Soo KIM

    发明人： Sung Jin WHANG ,  Dong Sun SHEEN ,  Seung Ho PYI ,  Min Soo KIM

    IPC分类号： H01L29/788 ,  H01L21/20

    CPC分类号： H01L27/11556 ,  H01L29/7889

    摘要： A semiconductor device according to an embodiment of the present invention includes a vertical channel layer protruding upward from a semiconductor substrate, a tunnel insulating layer covering a sidewall of the vertical channel layer, a plurality of floating gates separated from each other and stacked one upon another along the vertical channel layer, and surrounding the vertical channel layer with the tunnel insulating layer interposed therebetween, a plurality of control gates enclosing the plurality of floating gates, respectively, and an interlayer insulating layer provided between the plurality of control gates.

    摘要翻译： 根据本发明的实施例的半导体器件包括从半导体衬底向上突出的垂直沟道层，覆盖垂直沟道层的侧壁的隧道绝缘层，彼此分离并堆叠的多个浮动栅极 沿着垂直沟道层，并且在其间插入隧道绝缘层的周围的垂直沟道层，分别包围多个浮置栅极的多个控制栅极和设置在多个控制栅极之间的层间绝缘层。

    LATENCY CIRCUIT AND SEMICONDUCTOR DEVICE COMPRISING SAME
    8.
    发明申请
    LATENCY CIRCUIT AND SEMICONDUCTOR DEVICE COMPRISING SAME 有权
    包括相同的电路和半导体器件

    公开(公告)号：US20110085394A1

    公开(公告)日：2011-04-14

    申请号：US12857762

    申请日：2010-08-17

    申请人： In-Woo JUN ,  Byung Hoon JEONG ,  Min Soo KIM

    发明人： In-Woo JUN ,  Byung Hoon JEONG ,  Min Soo KIM

    IPC分类号： G11C7/00 ,  G11C8/18

    CPC分类号： G11C7/22 ,  G11C7/222 ,  G11C7/227 ,  G11C8/18 ,  G11C2207/2272

    摘要： A latency circuit comprises a latency control block, an internal read command generator, and a latency signal generation unit. The latency control block generates a plurality of first control clocks by delaying a delay sync signal generated based on an external clock, and generates a second control clock having a margin with respect to a read command decoded based on the delay sync signal. The internal read command generator samples the second control clock using the decoded read command and generates an internal read command based on a sampled second control clock. The latency signal generation unit generates a latency signal based on a shifting operation performed on the internal read command using the plurality of first control clocks.

    摘要翻译： 延迟电路包括等待时间控制块，内部读命令发生器和等待时间信号生成单元。 等待时间控制块通过延迟基于外部时钟产生的延迟同步信号来产生多个第一控制时钟，并且生成相对于基于延迟同步信号解码的读命令具有余量的第二控制时钟。 内部读命令生成器使用解码读命令对第二控制时钟进行采样，并根据采样的第二控制时钟生成内部读指令。 等待时间信号生成单元基于使用多个第一控制时钟对内部读取命令执行的移位操作生成等待时间信号。

    MULTIBAND DRC SYSTEM AND METHOD FOR CONTROLLING THE SAME
    10.
    发明申请
    MULTIBAND DRC SYSTEM AND METHOD FOR CONTROLLING THE SAME 有权
    多控制DRC系统及其控制方法

    公开(公告)号：US20110110533A1

    公开(公告)日：2011-05-12

    申请号：US12938586

    申请日：2010-11-03

    申请人： Yeongha CHOI ,  Min Soo KIM

    发明人： Yeongha CHOI ,  Min Soo KIM

    IPC分类号： H03G5/00

    CPC分类号： H03G9/18 ,  H03G9/005

    摘要： A multiband DRC system and a method for controlling the same are disclosed. In accordance with the present invention, the system and the method are capable of increasing an overall loudness of an output signal by controlling thresholds and gains of plurality of DRCs included in the multiband DRC system according to frequency bands.

    摘要翻译： 公开了一种多频带DRC系统及其控制方法。 根据本发明，系统和方法能够通过根据频带控制包括在多频带DRC系统中的多个DRC的阈值和增益来增加输出信号的总响度。