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    High dielectric constant gate oxides for silicon-based devices
    1.
    发明授权
    High dielectric constant gate oxides for silicon-based devices 有权
    用于硅基器件的高介电常数栅极氧化物

    公开(公告)号：US06404027B1

    公开(公告)日：2002-06-11

    申请号：US09499411

    申请日：2000-02-07

    申请人： Minghwei Hong ,  Ahmet Refik Kortan ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts

    发明人： Minghwei Hong ,  Ahmet Refik Kortan ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts

    IPC分类号： H01L2976

    CPC分类号： H01L21/28185 ,  H01L21/02192 ,  H01L21/02293 ,  H01L21/28194 ,  H01L21/28238 ,  H01L21/31604 ,  H01L29/045 ,  H01L29/517

    摘要： A high dielectric rare earth oxide of the form Mn2O3 (such as, for example, Gd2O3 or Y2O3) is grown on a clean silicon (100) substrate surface under an oxygen partial pressure less than or equal to 10−7 torr to form an acceptable gate oxide (in terms of dielectric constant (∈˜18) and thickness) that eliminates the tunneling current present in ultra-thin conventional SiO2 dielectrics and avoids the formation of a native oxide layer at the interface between the silicon substrate and the dielectric. Epitaxial films can be grown on vicinal silicon substrates and amorphous films on regular silicon substrates to form the high dielectric gate oxide.

    摘要翻译： 在氧分压小于或等于10 -7乇的条件下，在干净的硅（100）衬底表面上生长Mn2O3（例如，Gd 2 O 3或Y 2 O 3）形式的高电介质稀土氧化物以形成可接受的 栅极氧化物（以介电常数（ε〜18）和厚度计），其消除了超薄常规SiO 2电介质中存在的隧道电流，并避免在硅衬底和电介质之间的界面处形成自然氧化物层。 外延膜可以在邻硅衬底上和在常规硅衬底上的非晶膜上生长以形成高电介质栅极氧化物。

    Article comprising an oxide layer on a GaAs or GaN-based semiconductor body
    2.
    发明授权
    Article comprising an oxide layer on a GaAs or GaN-based semiconductor body 有权
    本文包括在GaAs或GaN基半导体本体上的氧化物层

    公开(公告)号：US06469357B1

    公开(公告)日：2002-10-22

    申请号：US09190193

    申请日：1998-11-12

    申请人： Minghwei Hong ,  Ahmet Refik Kortan ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts

    发明人： Minghwei Hong ,  Ahmet Refik Kortan ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts

    IPC分类号： H01L2976

    CPC分类号： H01L29/517 ,  C23C14/08 ,  H01L21/28158 ,  H01L21/28264 ,  H01L21/31604 ,  H01L33/44 ,  H01S5/028

    摘要： We have found that a single crystal, single domain oxide layer of thickness less than 5 nm can be grown on a (100) oriented GaAs-based semiconductor substrate. Similar epitaxial oxide can be grown on GaN and GaN-based semiconductors. The oxide typically is a rare earth oxide of the Mn2 0 3 structure (e.g., Gd2O3). The oxide/semiconductor interface can be of high quality, with low interface state density, and the oxide layer can have low leakage current and high breakdown voltage. The low thickness and high dielectric constant of the oxide layer result in a MOS structure of high capacitance per unit area. Such a structure advantageously forms a GaAs-based MOS-FET.

    摘要翻译： 我们已经发现，在（100）定向的GaAs基半导体衬底上可以生长厚度小于5nm的单晶单畴氧化物层。 可以在GaN和GaN基半导体上生长类似的外延氧化物。 氧化物通常是Mn 2 O 3结构的稀土氧化物（例如，Gd 2 O 3）。 氧化物/半导体界面可以具有高质量，低界面状态密度，并且氧化物层可以具有低漏电流和高击穿电压。 氧化物层的低厚度和高介电常数导致每单位面积的高电容的MOS结构。 这种结构有利地形成基于GaAs的MOS-FET。

    Method of making an article comprising an oxide layer on a GaAs-based semiconductor body
    3.
    发明授权
    Method of making an article comprising an oxide layer on a GaAs-based semiconductor body 有权
    在GaAs基半导体本体上制造包含氧化物层的制品的方法

    公开(公告)号：US06495407B1

    公开(公告)日：2002-12-17

    申请号：US09156719

    申请日：1998-09-18

    申请人： Minghwei Hong ,  Jenn-Ming Kuo ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts ,  Yu-Chi Wang

    发明人： Minghwei Hong ,  Jenn-Ming Kuo ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts ,  Yu-Chi Wang

    IPC分类号： H02L218238

    CPC分类号： H01L29/66522 ,  H01L21/2654 ,  H01L21/26553 ,  H01L21/28264 ,  H01L21/7605 ,  H01L29/78

    摘要： A novel method of forming a GaAs-based MOS structure comprises ion implantation after oxide formation, and subsequent slow heating and cooling, carried out such that essentially no interfacial defects that are detectable by high resolution transmission electron microscopy are formed. If the MOS structure is a MOS-FET then metal contacts are provided in conventional fashion. A post-metallization anneal can result in FETs that are substantially free of drain current/voltage hysteresis. MOS-FETs made according to the novel method can be produced with high yield and can have significantly increased lifetime, as compared to some prior art GaAs-based MOS-FETs.

    摘要翻译： 形成GaAs基MOS结构的新方法包括在形成氧化物之后的离子注入，然后进行缓慢的加热和冷却，使得基本上不形成可通过高分辨率透射电子显微镜检测的界面缺陷。 如果MOS结构是MOS-FET，则以常规方式提供金属触点。 后金属化退火可导致基本上没有漏极电流/电压滞后的FET。 与一些现有技术的GaAs基MOS-FET相比，可以以高产率制造出根据新颖方法制造的MOS-FET，并且可以显着增加寿命。

    Article comprising a gallium layer on a GaAs-based semiconductor, and method of making the article
    4.
    发明授权
    Article comprising a gallium layer on a GaAs-based semiconductor, and method of making the article 失效
    在GaAs系半导体上具有镓层的制品及其制造方法

    公开(公告)号：US5821171A

    公开(公告)日：1998-10-13

    申请号：US408678

    申请日：1995-03-22

    申请人： Minghwei Hong ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts ,  Matthias Passlack ,  Fan Ren ,  George John Zydzik

    发明人： Minghwei Hong ,  Jueinai Raynien Kwo ,  Joseph Petrus Mannaerts ,  Matthias Passlack ,  Fan Ren ,  George John Zydzik

    IPC分类号： C23C14/08 ,  H01L29/51 ,  H01L31/04 ,  H01L33/44 ,  H01S5/00 ,  H01S5/028 ,  H01L21/316

    CPC分类号： H01L29/517 ,  C23C14/08 ,  H01L33/44 ,  H01S5/028

    摘要： A high quality interface between a GaAs-based semiconductor and a Ga.sub.2 O.sub.3 dielectric an be formed if the semiconductor surface is caused to have less than 1% of a monolayer impurity coverage at completion of the first monolayer of the Ga.sub.2 O.sub.3 on the surface. This is achieved, for instance, by preparing the surface of a GaAs wafer under UHV conditions in a first growth chamber, transferring the wafer through a transfer module under UHV to a second growth chamber that is also under UHV, and growing the dielectric by evaporation of Ga.sub.2 O.sub.3 from a solid source, the process carried out such that the integrated impurity exposure of the surface is at most 100 Langmuirs. Articles according to the invention have low interface state density (

    摘要翻译： 如果半导体表面在表面上的Ga 2 O 3的第一单层完成时具有小于单层杂质覆盖率的1％，则形成GaAs基半导体和Ga 2 O 3电介质之间的高质量界面。 这通过例如通过在第一生长室中在UHV条件下制备GaAs晶片的表面来实现，将晶片通过UHV下的转移模块转移到也在UHV下的第二生长室，并通过蒸发使电介质生长 的Ga 2 O 3来自固体源，所述方法进行，使得表面的综合杂质暴露量为至多100兰缪尔。 根据本发明的制品具有低界面态密度（<1011 / cm2×Ve）和界面复合速度（<104cm / s）。 根据本发明的半导体/ Ga 2 O 3结构可以有利地用于各种电子或光电子器件，例如GaAs基MOS-FET，HBT，太阳能电池上的激光器。