公开(公告)号：US07073022B2

公开(公告)日：2006-07-04

申请号：US10155315

申请日：2002-05-23

申请人： Mohamad H. El-Batal ,  Yoshihiro Fujie ,  Thomas Sing-Klat Liong ,  Krishnakumar Rao Surugucchi

发明人： Mohamad H. El-Batal ,  Yoshihiro Fujie ,  Thomas Sing-Klat Liong ,  Krishnakumar Rao Surugucchi

IPC分类号： G06F12/00

CPC分类号： G06F13/385 ,  G06F3/0613 ,  G06F3/0658 ,  G06F3/0689

摘要： The present invention describes a method and system for interfacing a plurality of device controllers to an array of data storage devices by serial connection. The device controllers are coupled to a serial interface by a bus and the devices of the storage array are coupled to the serial interface by a serial connection. The serial interface receives controller signals through the bus and multiplexes the signals onto the serial connections of the storage array. Arbitration between the various device controllers seeking access to the storage array is resolved through bus protocol and through drive based reserve/release registers in the serial interface processor.

公开(公告)号：US06983396B2

公开(公告)日：2006-01-03

申请号：US10077249

申请日：2002-02-15

申请人： William A. Brant ,  Mohamad H. El-Batal ,  Thomas E. Richardson

发明人： William A. Brant ,  Mohamad H. El-Batal ,  Thomas E. Richardson

IPC分类号： G06F11/00

CPC分类号： G06F12/0866 ,  G06F12/0815

摘要： A bridged controller for reducing the overhead of cache coherency processing on each of a plurality of primary controllers and increasing the overall throughput of the system. The bridged controller interfaces with dual-active pair of host-side controllers and the backend disk drive buses. The third controller allows a doubling of the number of backend busses, reduces the overhead of cache coherency processing on each primary host-side controller and doubles the overall throughput.

公开(公告)号：US20080209099A1

公开(公告)日：2008-08-28

申请号：US11680366

申请日：2007-02-28

申请人： John R. Kloeppner ,  Dennis E. Gates ,  Robert E. Stubbs ,  Mohamad H. El-Batal ,  Russell J. Henry ,  Charles E. Nichols

发明人： John R. Kloeppner ,  Dennis E. Gates ,  Robert E. Stubbs ,  Mohamad H. El-Batal ,  Russell J. Henry ,  Charles E. Nichols

IPC分类号： G06F13/36

CPC分类号： G06F13/4022

摘要： Apparatus, systems and methods for clustering multiple PCI Express hierarchies to enable access of components in different hierarchies. Each PCI Express hierarchy includes a root device as well as a cluster port for coupling each hierarchy to each other hierarchy of a physical cluster through a PCI Express switched fabric. Memory addresses and transaction IDs are re-mapped by the cluster port of each hierarchy to partition the PCI Express space of the system of multiple hierarchies. A first portion of the partitioned space is reserved for access to local components within a hierarchy. A second portion of the space is used to access remote components of other hierarchies from within a different first hierarchy. The address and transaction ID values exchanged in such remote transactions are re-mapped and used by the cluster port of each hierarchy to route exchanges between hierarchies using standard PCIe root devices, endpoint devices, and switches.

摘要翻译： 用于聚类多个PCI Express层次结构的装置，系统和方法，以使得能够访问不同层次的组件。 每个PCI Express层次结构包括根设备以及通过PCI Express交换结构将每个层次结构耦合到物理集群的每个其他层次结构的集群端口。 内存地址和事务ID由每个层次结构的群集端口重新映射，以分区多层次系统的PCI Express空间。 保留分区空间的第一部分用于访问层次结构中的本地组件。 空间的第二部分用于从不同的第一层次结构中访问其他层次结构的远程组件。 在这种远程事务中交换的地址和事务ID值被每个层次结构的集群端口重新映射和使用，以使用标准PCIe根设备，端点设备和交换机在层次结构之间路由交换。

公开(公告)号：US07085958B2

公开(公告)日：2006-08-01

申请号：US10346820

申请日：2003-01-17

申请人： Mohamad H. El-Batal

发明人： Mohamad H. El-Batal

IPC分类号： G06F11/00

CPC分类号： G11C29/022 ,  G11C29/02

摘要： A system for isolating a faulty switch or respective storage device from a plurality of switches and respective storage devices in a daisy-chained arrangement. In the daisy-chain arrangement the switches are connected in sequence to permit access to the respective storage devices through the preceding switches in the sequence. All of the switches, except one, are set in a bypass mode where they do not read inputs of the respective storage devices. The one switch is set in a non bypass mode where it reads an input from its associated storage device. A status of the daisy-chain, either up or down, is then determined. If the status is up, the foregoing steps are repeated a number of iterations with a different one of the switches being set in a non bypass mode and the other switches being set in the bypass mode during each iteration, until the status of the daisy-chain is down. The down status indicates that the switch which is set in the non bypass mode or its associated storage device is defective.

摘要翻译： 一种用于以菊花链方式从多个开关和相应存储装置隔离故障开关或相应存储装置的系统。 在菊花链配置中，交换机按顺序连接，以允许按顺序通过前面的交换机访问相应的存储设备。 除了一个之外，所有的开关都被设置在旁路模式，它们不读取各个存储设备的输入。 一个开关设置在非旁路模式，其中它从其关联的存储设备读取输入。 然后确定菊花链的状态，无论是向上还是向下。 如果状态为up，则上述步骤重复进行多次迭代，其中不同的一个交换机被设置为非旁路模式，并且其他交换机在每次迭代期间被设置为旁路模式，直到菊花 - 链条下了 停机状态表示以非旁路模式设置的交换机或其关联的存储设备有故障。

公开(公告)号：US6085332A

公开(公告)日：2000-07-04

申请号：US130965

申请日：1998-08-07

申请人： Mohamad H. El-Batal

发明人： Mohamad H. El-Batal

IPC分类号： G06F1/24 ,  G06F3/06 ,  G06F11/20 ,  G06F3/00

CPC分类号： G06F11/2089 ,  G06F1/24 ,  G06F11/1441 ,  G06F3/0614 ,  G06F3/0632 ,  G06F3/0689 ,  G06F11/1417

摘要： A reset circuit implemented in a RAID controller configured for dual active operation. The reset circuit generates a reset pulse with a relatively invariant pulse width that is coupled to the controller's main CPU and I/O processors. The reset pulse can be generated in response to activation of an external common reset signal. The external common reset signal is activated by an external system (e.g., another controller configured for dual active operation) whenever the controller needs to be reset. This can be when the controller fails to maintain a communication signal transmitted to the external system or when the external system has inconsistent configuration information, requiring the entire system (i.e., both the controller and the external system) to be re-initialized. The reset pulse can also be generated in response to internal reset instructions issued by the controller's main CPU. The reset instructions can be issued whenever the first controller determines that its own configuration information is inconsistent. As a result of the reset instruction being issued the external common reset signal is activated as an output to reset the external system (i.e., the external common reset signal is bidirectional). The self-reset operation can be over-ridden by a reset disable instruction.

摘要翻译： 在RAID控制器中实现的复位电路，配置为双重主动操作。 复位电路产生具有相对不变的脉冲宽度的复位脉冲，该脉冲宽度耦合到控制器的主CPU和I / O处理器。 可以响应于外部公共复位信号的激活而产生复位脉冲。 只要控制器需要复位，外部公用复位信号由外部系统（例如，配置为双重主动操作的另一个控制器）激活。 这可以是当控制器不能保持发送到外部系统的通信信号时，或者当外部系统具有不一致的配置信息时，需要整个系统（即，控制器和外部系统两者）被重新初始化。 也可以根据控制器主CPU发出的内部复位指令产生复位脉冲。 每当第一个控制器确定其自身的配置信息不一致时，就可以发出复位指令。 作为发出复位指令的结果，外部公共复位信号被激活作为复位外部系统的输出（即，外部公共复位信号是双向的）。 自复位操作可以被复位禁止指令覆盖。

公开(公告)号：US09019708B2

公开(公告)日：2015-04-28

申请号：US13217650

申请日：2011-08-25

申请人： Macen Shinsato ,  Mohamad H. El-Batal ,  Robert E. Stubbs ,  Jason M. Stuhlsatz ,  John R. Kloeppner

发明人： Macen Shinsato ,  Mohamad H. El-Batal ,  Robert E. Stubbs ,  Jason M. Stuhlsatz ,  John R. Kloeppner

IPC分类号： H05K7/16 ,  H05K5/00 ,  G06F1/18 ,  G11B33/12

CPC分类号： G06F1/181 ,  G06F1/187 ,  G11B33/128

摘要： Apparatus and systems for improved access to storage devices from the sides of sleds mounted in storage enclosures. Embodiments provide apparatus and systems for a sled in a storage enclosure that provides access to storage devices on either side of the sled when the sled is slid forward out of its enclosure. Multiple sleds may be enclosed within a single enclosure to permit access to a portion of the storage devices in the enclosure hence reducing the problems of instability of the rack if the enclosure is mounted near the top of the rack.

摘要翻译： 用于改进从安装在存储外壳中的雪橇侧面进入存储设备的装置和系统。 实施例提供了一种用于存储壳体中的滑轨的装置和系统，当滑板向前滑出其外壳时，可提供对滑板两侧的存储设备的访问。 多个滑板可以封闭在单个外壳内，以允许访问外壳中的一部分存储设备，从而如果外壳安装在机架顶部附近，则可以减少机架的不稳定性问题。

公开(公告)号：US08595313B2

公开(公告)日：2013-11-26

申请号：US11289140

申请日：2005-11-29

申请人： Bret S. Weber ,  Mohamad H. El-Batal ,  William P. Delaney

发明人： Bret S. Weber ,  Mohamad H. El-Batal ,  William P. Delaney

IPC分类号： G06F15/167

CPC分类号： G06F15/17331 ,  G06F3/0607 ,  G06F3/0658 ,  G06F3/067 ,  G06F12/0866 ,  H04L67/1097

摘要： Systems and associated methods for flexible scalability of storage systems. In one aspect, a storage controller may include an interface to a fabric adapted to permit each storage controller coupled to the fabric to directly access memory mapped components of all other storage controllers coupled to the fabric. The CPU and other master device circuits within a storage controller may directly address memory an I/O devices directly coupled thereto within the same storage controller and may use RDMA features to directly address memory an I/O devices of other storage controllers through the fabric interface.

摘要翻译： 存储系统灵活可扩展性的系统和相关方法。 在一个方面，存储控制器可以包括适合于允许耦合到结构的每个存储控制器直接访问耦合到该结构的所有其他存储控制器的存储器映射组件的结构的接口。 存储控制器内的CPU和其他主设备电路可以直接在同一存储控制器内对与其直接耦合的I / O设备的存储器进行寻址，并且可以使用RDMA特征来通过结构接口直接对其他存储控制器的I / O设备寻址存储器 。

公开(公告)号：US07562176B2

公开(公告)日：2009-07-14

申请号：US11680366

申请日：2007-02-28

申请人： John R. Kloeppner ,  Dennis E. Gates ,  Robert E. Stubbs ,  Mohamad H. El-Batal ,  Russell J. Henry ,  Charles E. Nichols

发明人： John R. Kloeppner ,  Dennis E. Gates ,  Robert E. Stubbs ,  Mohamad H. El-Batal ,  Russell J. Henry ,  Charles E. Nichols

IPC分类号： G06F13/36 ,  G06F13/20 ,  G06F13/00 ,  G06F15/16

CPC分类号： G06F13/4022

摘要： Apparatus, systems and methods for clustering multiple PCI Express hierarchies to enable access of components in different hierarchies. Each PCI Express hierarchy includes a root device as well as a cluster port for coupling each hierarchy to each other hierarchy of a physical cluster through a PCI Express switched fabric. Memory addresses and transaction IDs are re-mapped by the cluster port of each hierarchy to partition the PCI Express space of the system of multiple hierarchies. A first portion of the partitioned space is reserved for access to local components within a hierarchy. A second portion of the space is used to access remote components of other hierarchies from within a different first hierarchy. The address and transaction ID values exchanged in such remote transactions are re-mapped and used by the cluster port of each hierarchy to route exchanges between hierarchies using standard PCIe root devices, endpoint devices, and switches.

摘要翻译： 用于聚类多个PCI Express层次结构的装置，系统和方法，以使得能够访问不同层次的组件。 每个PCI Express层次结构包括根设备以及通过PCI Express交换结构将每个层次结构耦合到物理集群的每个其他层次结构的集群端口。 内存地址和事务ID由每个层次结构的群集端口重新映射，以分区多层次系统的PCI Express空间。 保留分区空间的第一部分用于访问层次结构中的本地组件。 空间的第二部分用于从不同的第一层次结构中访问其他层次结构的远程组件。 在这种远程事务中交换的地址和事务ID值被每个层次结构的集群端口重新映射和使用，以使用标准PCIe根设备，端点设备和交换机在层次结构之间路由交换。

公开(公告)号：US07467266B2

公开(公告)日：2008-12-16

申请号：US10634277

申请日：2003-08-05

申请人： David Alan Burton ,  Mohamad H. El-Batal ,  Noel Simen Otterness ,  Alan Lee Stewart

发明人： David Alan Burton ,  Mohamad H. El-Batal ,  Noel Simen Otterness ,  Alan Lee Stewart

IPC分类号： G06F12/00

CPC分类号： G06F17/30088 ,  G06F2201/84 ,  Y10S707/99953 ,  Y10S707/99955

摘要： Snapshot sets comprising snapshot criteria are created, maintained, and executed via a command set designed to facilitate managing and conducting snapshots on data distributed across multiple volumes. Snapshot criteria such as source volume, target volume, redundancy level, copy mode, and the like are added as desired to a snapshot set. Upon invocation of an execute command, the fast replication operations defined by the snapshot set are executed, providing a logically atomic data replication utility potentially involving multiple sources and targets. In one embodiment auto selection of a target may be specified, thus facilitating over-subscription of target resources. The present invention reduces the complexity of archiving data—particularly data distributed across multiple volumes such as data associated with database applications and the like.

摘要翻译： 创建，维护和执行包含快照条件的快照集合，并通过一组命令集来执行，该命令集旨在帮助管理和执行跨多个卷分发的数据的快照。 诸如源卷，目标卷，冗余级别，复制模式等的快照标准根据需要添加到快照集中。 在调用执行命令后，执行由快照集定义的快速复制操作，提供可能涉及多个源和目标的逻辑上原子数据复制实用程序。 在一个实施例中，可以指定目标的自动选择，从而有助于过度订阅目标资源。 本发明降低了归档数据的复杂性，特别是分布在多个卷上的数据，例如与数据库应用相关联的数据等。

公开(公告)号：US07260423B2

公开(公告)日：2007-08-21

申请号：US10838726

申请日：2004-05-04

申请人： Thomas E. Richardson ,  Zahirudeen Premji ,  Mohamad H. El-Batal

发明人： Thomas E. Richardson ,  Zahirudeen Premji ,  Mohamad H. El-Batal

IPC分类号： H04B1/38 ,  H04B7/00

CPC分类号： H04B1/38 ,  H04B1/3816

摘要： A circuit providing a wireless connection for receipt and/or transmission of electronic signals between a storage device and an external device such as a host system, a storage subsystem controller, or a storage subsystem. The wireless connection circuit may include a wireless data connection to provide wireless exchange of data signals between the storage device and the external device. The wireless connection circuit may also provide an inductive coupling for power supplied to the storage device. In one aspect hereof the wireless connectivity (data, power or both) may be provided as enhanced circuits on a controller circuit integrated with the storage device. In another aspect hereof, the wireless connectivity may be provided as an adapter or interface circuit coupled to an existing storage device interface to adapt wired connections of the storage device to an external device through a wireless signal exchange protocol.

摘要翻译： 提供用于在存储设备和诸如主机系统，存储子系统控制器或存储子系统的外部设备之间接收和/或传送电子信号的无线连接的电路。 无线连接电路可以包括无线数据连接，以在存储设备和外部设备之间提供数据信号的无线交换。 无线连接电路还可以为提供给存储设备的功率提供电感耦合。 在一个方面，无线连接（数据，电源或两者）可以作为与存储设备集成的控制器电路上的增强电路来提供。 在本文的另一方面，无线连接可以被提供为耦合到现有存储设备接口的适配器或接口电路，以通过无线信号交换协议来将存储设备的有线连接调整到外部设备。