摘要:
Disclosed in this application is the placement of an additional integrator between the first stage integrator output and the input to the attenuator/low pass filter. This approach reduces the input referred offset by a factor equal to the gain of the additional integrator, and the offset of the additional integrator itself will be divided by the gain of the first-stage integrator.
摘要:
Disclosed is a chopper-stabilized amplifier with current steering used as output switching and to be operated in a low power supply voltage environment.
摘要:
A method of testing an integrated circuit including the steps of observing a selected parameter at a selected test mode to detect an error. The current to the integrated circuit is stepped from a reference level by selected amount.
摘要:
A method of testing an integrated circuit including a plurality of test nodes includes initiating a test mode and, during a first time interval of the test mode, stepping a level of a supply current of the integrated circuit to a calibration level. Parameters are observed at the plurality of test nodes to detect errors during a second time interval of the test mode and the level of the supply current selectively stepped in response to a number of errors detected. The level of the supply current is decoded to identify the detected errors.
摘要:
A method of testing an integrated circuit includes setting a guardbanded limit for a parameter associated with an embedded node, a deviation from the guardbanded limit under a set of test conditions correlated with a failure of the integrated circuit across a range of operating conditions. A test is performed under the test conditions to detect deviations of the parameter from the guardbanded limit to detect failures of the integrated circuit over the range of operating conditions.
摘要:
An amplifier is disclosed including multiple integrator stages. The amplifier includes a low-frequency path from a signal input to a signal output and relatively higher-frequency bypass paths around the first integrator stage. The paths converge at a summing node. To prevent instability when the integrators are saturated by large signals, the circuit includes a saturation detector which disables the relatively low-frequency paths during such saturation conditions.
摘要:
A method of operating an amplifier circuit having a pre-charge phase and a sample/conversion phase includes, during a pre-charge phase, charging first and second capacitors to first and second bias voltages. The first capacitor is coupled to a first input of an amplifier circuit, which has a second input and an output. The second capacitor is coupled to the second input. During a sample/conversion phase, the first input of the amplifier circuit is coupled to an input signal through the first capacitor to level-shift the input signal according to the first bias voltage and the output of the amplifier is coupled to the second input through the second capacitor to level shift a feedback signal according to the second bias voltage.
摘要:
In an embodiment, a method includes: during a first portion of a cycle of a clock signal generated by an oscillator, pre-charging a first capacitor of a first switched capacitor stage until a first comparator determines that a first node voltage of the first switched capacitor stage is greater than a first reference voltage at a first reference voltage node; applying a second reference voltage to the first reference voltage node; and responsive to a first edge of the clock signal, charging the first capacitor until the first comparator determines that the first node voltage is greater than the second reference voltage at the first reference voltage node.
摘要:
A Schmitt trigger comprises first and second circuitry. The first circuitry receives an input voltage and provides an output voltage at either a logical “low” or a logical “high” voltage level responsive to the input voltage and a first bias voltage. The second circuitry connects to the first circuitry to generate a second bias current for generating the output voltage. The second bias current is larger than the first bias current. The Schmitt trigger operates in a low power mode of operation using only the first bias voltage to maintain the logical “low” voltage level or the logical “high” voltage level at a substantially constant level. In a high power mode of operation the Schmitt trigger uses the second bias voltage during transition periods between the logical “low” voltage level and the logical “high” voltage level.
摘要:
A noise cancellation signal is generated for a fractional-N phase-locked loop (200). A divide value is provided to a first delta sigma modulator circuit (203), which generates a divide control signal to control a divide value of a feedback divider (208) in the phase-locked loop. An error term (e) is generated that is indicative of a difference between the generated divide control signal and the divide value supplied to the first delta sigma modulator circuit. The error term is integrated in an integrator (320) to generate an integrated error term (x), where xk+1=xk+ek; and a phase error correction circuit (209) utilizes the error term ek and the integrated error term xk to generate the phase error cancellation signal.