INDUCTOR AND POWER AMPLIFIER MODULE
    1.
    发明申请

    公开(公告)号:US20190006075A1

    公开(公告)日:2019-01-03

    申请号:US16026469

    申请日:2018-07-03

    Abstract: An inductor includes first and second wirings respectively formed in a substantially spiral shape on first and second surfaces of a multilayer substrate. The multilayer substrate includes plural dielectric layers stacked on each other in a predetermined direction. The multilayer substrate includes a first layer having the first surface, which is an end surface in the predetermined direction, and a second layer having the second surface within the multilayer substrate. The width of the second wiring is smaller than that of the first wiring. The first and second wirings are electrically connected in parallel with each other. The inductance of the first wiring and that of the second wiring are substantially equal to each other. When the first and second wirings are projected on the first surface in the predetermined direction, entirety of a projected image of the second wiring is contained within that of the first wiring.

    HIGH FREQUENCY MODULE
    2.
    发明申请
    HIGH FREQUENCY MODULE 审中-公开
    高频模块

    公开(公告)号:US20160308575A1

    公开(公告)日:2016-10-20

    申请号:US15198214

    申请日:2016-06-30

    Abstract: Provided is a high frequency module capable of reducing the IMD. During the transmission/reception operation based on W-CDMA, control signals VSWCC, VTRXCC are output as Hi signals from a control logic. Consequently, transistor T1 is turned ON, and transistors T2, T3 are respectively turned OFF. When the transistor T1 is turned ON, the voltage output from an operational amplifier is output as the signal VVSW to a control terminal, and the control signal VTRXC is output as a Hi signal. The signal VVSW is of a voltage level that is lower than that of the control signal VTRXC. The control signal VTRXC is a signal for turning ON a transistor circuit Q1, and the signal VVSW is a signal for supplying a DC voltage to the antenna potential. It is thereby possible to reduce the ON resistance of the transistor circuit Q1 and improve the IMD characteristics.

    Abstract translation: 提供了能够减少IMD的高频模块。 在基于W-CDMA的发送/接收操作期间,控制信号VSWCC,VTRXCC作为Hi信号从控制逻辑输出。 因此,晶体管T1导通,晶体管T2,T3分别断开。 当晶体管T1导通时,从运算放大器输出的电压作为信号VVSW输出到控制端,控制信号VTRXC输出为Hi信号。 信号VVSW的电压电平低于控制信号VTRXC的电压电平。 控制信号VTRXC是用于接通晶体管电路Q1的信号,信号VVSW是向天线电位提供直流电压的信号。 从而可以降低晶体管电路Q1的导通电阻并提高IMD特性。

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