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公开(公告)号:US20100009514A1
公开(公告)日:2010-01-14
申请号:US12417114
申请日:2009-04-02
申请人: Myung Lae LEE , Jong Hyun Lee , Sung Sik Yun , Dae Hun Jeong , Gunn Hwang , Chang Auck Choi , Chang Han Je , Jae Yong An
发明人: Myung Lae LEE , Jong Hyun Lee , Sung Sik Yun , Dae Hun Jeong , Gunn Hwang , Chang Auck Choi , Chang Han Je , Jae Yong An
IPC分类号: H01L21/306
CPC分类号: B81C1/00619 , B81C1/00626 , B81C2201/0132 , B81C2201/0133
摘要: A method of fabricating a micro-vertical structure is provided. The method includes bonding a second crystalline silicon (Si) substrate onto a first crystalline Si substrate by interposing an insulating layer pattern and a cavity, etching the second crystalline Si substrate using a deep reactive ion etch (DRIE) process along a [111] crystal plane vertical to the second crystalline Si substrate, and etching an etched vertical surface of the second crystalline Si substrate using a crystalline wet etching process to improve the surface roughness and flatness of the etched vertical surface. As a result, no morphological defects occur on the etched vertical surface. Also, footings do not occur at an etch end-point due to the insulating layer pattern. In addition, the micro-vertical structure does not float in the air but is fixed to the first crystalline Si substrate, thereby facilitating subsequent processes.
摘要翻译: 提供一种制造微垂直结构的方法。 该方法包括通过插入绝缘层图案和空腔将第二晶体硅(Si)衬底接合到第一晶体Si衬底上,使用沿[111]晶体的深反应离子蚀刻(DRIE)工艺蚀刻第二晶体Si衬底 垂直于第二晶体Si衬底,并且使用结晶湿蚀刻工艺蚀刻第二晶体Si衬底的蚀刻垂直表面,以改善蚀刻垂直表面的表面粗糙度和平坦度。 结果,蚀刻的垂直表面上没有形成形态缺陷。 此外,由于绝缘层图案,在蚀刻终点处不发生基脚。 此外,微垂直结构不会浮在空气中,而是固定在第一晶体Si衬底上,从而有助于后续工艺。
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公开(公告)号:US07745308B2
公开(公告)日:2010-06-29
申请号:US12417114
申请日:2009-04-02
申请人: Myung Lae Lee , Jong Hyun Lee , Sung Sik Yun , Dae Hun Jeong , Gunn Hwang , Chang Auck Choi , Chang Han Je , Jae Yong An
发明人: Myung Lae Lee , Jong Hyun Lee , Sung Sik Yun , Dae Hun Jeong , Gunn Hwang , Chang Auck Choi , Chang Han Je , Jae Yong An
IPC分类号: H01L21/00
CPC分类号: B81C1/00619 , B81C1/00626 , B81C2201/0132 , B81C2201/0133
摘要: A method of fabricating a micro-vertical structure is provided. The method includes bonding a second crystalline silicon (Si) substrate onto a first crystalline Si substrate by interposing an insulating layer pattern and a cavity, etching the second crystalline Si substrate using a deep reactive ion etch (DRIE) process along a [111] crystal plane vertical to the second crystalline Si substrate, and etching an etched vertical surface of the second crystalline Si substrate using a crystalline wet etching process to improve the surface roughness and flatness of the etched vertical surface. As a result, no morphological defects occur on the etched vertical surface. Also, footings do not occur at an etch end-point due to the insulating layer pattern. In addition, the micro-vertical structure does not float in the air but is fixed to the first crystalline Si substrate, thereby facilitating subsequent processes.
摘要翻译: 提供一种制造微垂直结构的方法。 该方法包括通过插入绝缘层图案和空腔将第二晶体硅(Si)衬底接合到第一晶体Si衬底上,使用沿[111]晶体的深反应离子蚀刻(DRIE)工艺蚀刻第二晶体Si衬底 垂直于第二晶体Si衬底,并且使用结晶湿蚀刻工艺蚀刻第二晶体Si衬底的蚀刻垂直表面,以改善蚀刻垂直表面的表面粗糙度和平坦度。 结果,蚀刻的垂直表面上没有形成形态缺陷。 此外,由于绝缘层图案,在蚀刻终点处不发生基脚。 此外,微垂直结构不会浮在空气中,而是固定在第一晶体Si衬底上,从而有助于后续工艺。
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