公开(公告)号：US20080102410A1

公开(公告)日：2008-05-01

申请号：US11976211

申请日：2007-10-22

申请人： Ji-Eun Kim ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Jeong-Woo Park ,  Sang-Duck Kim

发明人： Ji-Eun Kim ,  Myung-Sam Kang ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Jeong-Woo Park ,  Sang-Duck Kim

IPC分类号： G03C5/00

CPC分类号： H01L21/4857 ,  H01L23/13 ,  H01L23/49822 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/15153 ,  H01L2924/1517 ,  H05K1/183 ,  H05K3/108 ,  H05K3/20 ,  H05K3/4658 ,  H05K3/4697 ,  H05K2203/308 ,  H01L2224/0401

摘要： A method of manufacturing a printed circuit board is disclosed, in which a cavity is formed for embedding a component, which includes: providing a core board, in which an inner circuit is buried; forming a first via in the core board for interlayer conduction; selectively forming a first photoresist in a position on the core board in correspondence with a position of the cavity; stacking a first build-up layer, on which a first outer circuit is formed, on the core board; and selectively removing the first build-up layer in correspondence with the position of the cavity and removing the first photoresist. Utilizing the method, a board can be manufactured with greater precision, as the thickness tolerance of the cavity may be obtained by controlling the thickness of the photoresist, and the overall thickness of the board can be controlled by controlling the height of the cavity.

摘要翻译： 公开了一种制造印刷电路板的方法，其中形成用于嵌入部件的空腔，其包括：提供其中埋入内部电路的芯板; 在芯板中形成层间导电的第一通孔; 在所述芯板上与所述腔的位置对应地选择性地形成第一光致抗蚀剂; 在芯板上堆叠形成有第一外部电路的第一堆积层; 并且与空腔的位置相对应地选择性地去除第一堆积层并除去第一光致抗蚀剂。 利用该方法，可以通过控制光致抗蚀剂的厚度来获得更高精度的板，因为通过控制光致抗蚀剂的厚度可以获得空腔的厚度公差，并且可以通过控制空腔的高度来控制板的整体厚度。

公开(公告)号：US20090011220A1

公开(公告)日：2009-01-08

申请号：US12153155

申请日：2008-05-14

申请人： Jung-Hyun Park ,  Jeong-Woo Park ,  Sang-Duck Kim ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Myung-Sam Kang

发明人： Jung-Hyun Park ,  Jeong-Woo Park ,  Sang-Duck Kim ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Myung-Sam Kang

IPC分类号： H05K1/05 ,  B29C65/42 ,  B32B7/00 ,  B32B7/12

CPC分类号： H05K3/205 ,  H05K3/108 ,  H05K3/4602 ,  H05K2203/1536 ,  Y10T428/249984 ,  Y10T428/31504 ,  Y10T428/31511 ,  Y10T428/3154 ,  Y10T428/31678 ,  Y10T428/31721 ,  Y10T428/31993

摘要： A carrier and a method for manufacturing a printed circuit board are disclosed. The method for manufacturing a printed circuit board may include: forming a first circuit pattern on each of a pair of release layers, which are attached respectively to either side of a base layer by adhesive layers; detaching the pair of release layers from the base layer; stacking and pressing the pair of release layers onto either side of an insulation substrate such that the first circuit patterns are buried in the insulation substrate; and separating the pair of release layers. By forming a circuit pattern on each of a pair of release layers with a single process, and transferring the circuit pattern into each side of an insulation substrate, the manufacturing process can be shortened and circuit patterns can be formed to a high density.

摘要翻译： 公开了载体和制造印刷电路板的方法。 制造印刷电路板的方法可以包括：在一对剥离层中的每一个上形成第一电路图案，其分别通过粘合剂层附着在基层的任一侧; 将一对释放层从基层分离; 堆叠并将一对释放层压在绝缘基板的任一侧上，使得第一电路图案被埋在绝缘基板中; 并分离一对释放层。 通过利用单一工艺在一对释放层的每一个上形成电路图案，并将电路图案转移到绝缘基板的每一侧，可以缩短制造工艺并且可以以高密度形成电路图案。

公开(公告)号：US20080105458A1

公开(公告)日：2008-05-08

申请号：US11976762

申请日：2007-10-26

申请人： Myung-Sam Kang ,  Jung-Hyun Park ,  Sang-Duck Kim ,  Ji-Eun Kim ,  Jong-Gyu Choi

发明人： Myung-Sam Kang ,  Jung-Hyun Park ,  Sang-Duck Kim ,  Ji-Eun Kim ,  Jong-Gyu Choi

IPC分类号： H05K1/09 ,  H05K3/00

CPC分类号： H01L23/13 ,  H01L21/4853 ,  H01L23/3114 ,  H01L23/49816 ,  H01L2924/00013 ,  H01L2924/0002 ,  H05K1/111 ,  H05K3/107 ,  H05K3/4007 ,  H05K2201/0367 ,  H05K2201/09745 ,  H05K2201/10674 ,  Y02P70/611 ,  Y10T29/49147 ,  H01L2224/29099 ,  H01L2924/00

摘要： A substrate for mounting a flip chip and a method of manufacturing the substrate method of manufacturing the substrate are disclosed. Using a method of manufacturing a substrate for flip chip mounting that includes providing an insulating layer, in which a circuit pattern is buried, and forming at least one bump pad shaped as an indentation by removing at least one portion of the circuit pattern, the bumps pads can be formed by removing portions of a circuit pattern in the shape of indentations, to prevent solder bumps from flowing to the insulating layer portions and reduce the pitch between bumps.

摘要翻译： 公开了一种用于安装倒装芯片的基板和制造基板的制造方法的方法。 使用制造用于倒装芯片安装的衬底的方法，其包括提供绝缘层，其中埋置电路图案，并且通过去除电路图案的至少一部分形成形成凹陷的至少一个凸块焊盘，所述凸块 可以通过去除凹陷形状的电路图案的部分来形成焊盘，以防止焊料凸块流到绝缘层部分并降低凸块之间的间距。

公开(公告)号：US20080251494A1

公开(公告)日：2008-10-16

申请号：US12078058

申请日：2008-03-26

申请人： Jung-Hyun Park ,  Byoung-Youl Min ,  Jeong-Woo Park ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Myung-Sam Kang

发明人： Jung-Hyun Park ,  Byoung-Youl Min ,  Jeong-Woo Park ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Myung-Sam Kang

IPC分类号： H01B13/00 ,  C25D5/34

CPC分类号： C25D7/123 ,  H05K3/0038 ,  H05K3/108 ,  H05K3/205 ,  H05K3/421 ,  H05K3/423 ,  H05K2201/0376 ,  H05K2201/0394 ,  H05K2201/09563 ,  H05K2203/108

摘要： A method of manufacturing a circuit board is disclosed. The method may include: forming a relievo pattern, which is in a corresponding relationship with a circuit pattern, on a metal layer that is stacked on a carrier; stacking and pressing the carrier onto an insulation layer with the relievo pattern facing the insulation layer; transcribing the metal layer and the relievo pattern into the insulation layer by removing the carrier; forming a via hole in the insulation layer on which the metal layer is transcribed; and filling the via hole and forming a plating layer over the metal layer by performing plating over the insulation layer on which the metal layer is transcribed. As the relievo pattern may be formed on the metal layer stacked on the carrier, and the relievo pattern may be transcribed into the insulation layer, high-density circuit patterns can be formed.

摘要翻译： 公开了一种制造电路板的方法。 该方法可以包括：在层叠在载体上的金属层上形成与电路图案对应关系的释放图案; 将载体堆叠并压制到绝缘层上，其中减震图案面向绝缘层; 通过移除载体将金属层和释放图案转印到绝缘层中; 在所述绝缘层上形成通孔，所述绝缘层中所述金属层被转录到所述绝缘层上; 并通过在其上转印有金属层的绝缘层上进行电镀来填充通孔并在金属层上形成镀层。 由于可以在堆叠在载体上的金属层上形成缓和图案，并且可以将缓冲图案转录到绝缘层中，可以形成高密度电路图案。

公开(公告)号：US08986555B2

公开(公告)日：2015-03-24

申请号：US12892047

申请日：2010-09-28

申请人： Ji-Eun Kim ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

发明人： Ji-Eun Kim ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

IPC分类号： H01B13/00 ,  H05K3/40 ,  H05K3/06 ,  H05K3/20

CPC分类号： H05K3/4007 ,  H05K3/061 ,  H05K3/205 ,  H05K2201/0367 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of manufacturing a printed circuit board having a bump is disclosed. The method includes preparing a first carrier having a first circuit formed thereon, compressing the first carrier to one surface of an insulation layer such that the first circuit is buried, stacking an etching resist on the first carrier in accordance with where the bump is to be formed and forming the bump by etching the first carrier. In accordance with an embodiment of the present invention, the difference in height between a bump and its adjacent bump in a printed circuit board can be reduced, and thus electrical connection between an electronic component and the printed circuit board can be better implemented.

摘要翻译： 公开了一种制造具有凸块的印刷电路板的方法。 该方法包括制备其上形成有第一电路的第一载体，将第一载体压缩到绝缘层的一个表面，使得第一电路被掩埋，根据凸点将在第一载体上堆叠抗蚀剂 通过蚀刻第一载体形成和形成凸块。 根据本发明的实施例，可以减小印刷电路板中的凸块与其相邻凸块之间的高度差，从而可以更好地实现电子部件和印刷电路板之间的电连接。

公开(公告)号：US20110110058A1

公开(公告)日：2011-05-12

申请号：US12748082

申请日：2010-03-26

申请人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

发明人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim ,  Young-Hwan Shin ,  Kyung-Ro Yoon

IPC分类号： H05K7/02 ,  H05K3/00

CPC分类号： H05K3/00 ,  H01L2224/16225 ,  H05K3/30 ,  Y10T29/49124

摘要： A single-layer board on chip package substrate and a manufacturing method thereof are disclosed. In accordance with an embodiment of the present invention, the single-layer board on chip package substrate includes an insulator, a circuit pattern and a flip-chip bonding pad, which are formed on an upper surface of the insulator, a conductive bump, which is in contact with a lower surface of the circuit pattern and penetrates through the insulator, a solder resist layer, which is formed on the upper surface of the insulator such that at least a portion of the flip-chip bonding pad is exposed, and a flip-chip bonding bump, which is formed on an upper surface of the flip-chip bonding pad in order to make a flip-chip connection with an electronic component.

摘要翻译： 公开了一种单层片上封装衬底及其制造方法。 根据本发明的实施例，片上封装衬底上的单层板包括形成在绝缘体上表面上的绝缘体，电路图案和倒装焊接焊盘，导体凸块， 与电路图案的下表面接触并穿透绝缘体，阻焊层，其形成在绝缘体的上表面上，使得至少一部分倒装芯片接合焊盘露出，并且 倒装芯片焊接凸块，其形成在倒装焊盘的上表面上，以便与电子部件进行倒装芯片连接。

公开(公告)号：US20110100952A1

公开(公告)日：2011-05-05

申请号：US12892047

申请日：2010-09-28

申请人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

发明人： Ji-Eun KIM ,  Nam-Keun Oh ,  Jung-Hyun Park ,  Young-Ji Kim ,  Jong-Gyu Choi ,  Sang-Duck Kim

IPC分类号： H05K3/06

CPC分类号： H05K3/4007 ,  H05K3/061 ,  H05K3/205 ,  H05K2201/0367 ,  H05K2203/0152 ,  H05K2203/0376

摘要： A method of manufacturing a printed circuit board having a bump is disclosed. The method includes preparing a first carrier having a first circuit formed thereon, compressing the first carrier to one surface of an insulation layer such that the first circuit is buried, stacking an etching resist on the first carrier in accordance with where the bump is to be formed and forming the bump by etching the first carrier. In accordance with an embodiment of the present invention, the difference in height between a bump and its adjacent bump in a printed circuit board can be reduced, and thus electrical connection between an electronic component and the printed circuit board can be better implemented.

摘要翻译： 公开了一种制造具有凸块的印刷电路板的方法。 该方法包括制备其上形成有第一电路的第一载体，将第一载体压缩到绝缘层的一个表面，使得第一电路被掩埋，根据凸点将在第一载体上堆叠抗蚀剂 通过蚀刻第一载体形成和形成凸块。 根据本发明的实施例，可以减小印刷电路板中的凸块与其相邻凸块之间的高度差，从而可以更好地实现电子部件和印刷电路板之间的电连接。

公开(公告)号：US08889994B2

公开(公告)日：2014-11-18

申请号：US13018971

申请日：2011-02-01

申请人： Young-Ji Kim ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

发明人： Young-Ji Kim ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

IPC分类号： H05K1/16

CPC分类号： H05K1/11 ,  H05K3/06 ,  Y10T29/49144 ,  Y10T29/49156

摘要： A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.

摘要翻译： 公开了一种单层印刷电路板及其制造方法。 根据本发明的实施例，该方法可以包括在绝缘膜的表面上形成焊盘，电路图案和柱，其中柱的一个端部电连接到绝缘膜的至少一部分 电路图案，将电路图案和柱埋在绝缘体中的绝缘膜表面上的绝缘体按压绝缘体，选择性地蚀刻绝缘体，使得柱的另一端暴露，并且打开一部分 所述绝缘膜使得所述焊盘的至少一部分露出。

公开(公告)号：US08418355B2

公开(公告)日：2013-04-16

申请号：US11976071

申请日：2007-10-19

申请人： Sang-Duck Kim ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Jeong-Woo Park

发明人： Sang-Duck Kim ,  Jung-Hyun Park ,  Hoe-Ku Jung ,  Jong-Gyu Choi ,  Ji-Eun Kim ,  Jeong-Woo Park

IPC分类号： H05K3/20

CPC分类号： H05K3/20 ,  H05K3/205 ,  H05K3/207 ,  H05K3/386 ,  H05K2203/0113 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49163

摘要： A method for forming transcriptional circuits and a method for manufacturing a circuit board are disclosed. A method of forming a transcriptional circuit, which includes forming an intaglio pattern corresponding to a circuit pattern by selectively forming a resist on a mold board, filling conductive material in the intaglio pattern, and transferring the conductive material onto a carrier by pressing the carrier onto the mold board such that the carrier faces the surface of the mold board having the conductive material filled in, makes it possible to form transcriptional circuits that can be transcribed into an insulation board using existing equipment, whereby costs can be reduced.

摘要翻译： 公开了一种形成转录电路的方法及其制造方法。 一种形成转录电路的方法，其包括通过在模板上选择性地形成抗蚀剂来形成对应于电路图案的凹版图案，将导电材料填充到凹版图案中，以及通过将载体压载到载体上而将载体转移到 使得载体面向具有填充有导电材料的模板的表面的模板，使得可以形成可以使用现有设备转录成绝缘板的转录电路，由此可以降低成本。

公开(公告)号：US20110186342A1

公开(公告)日：2011-08-04

申请号：US13018971

申请日：2011-02-01

申请人： Young-Ji KIM ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

发明人： Young-Ji KIM ,  Kyung-Ro Yoon ,  Sang-Duck Kim ,  Jung-Hyun Park ,  Nam-Keun Oh ,  Jong-Gyu Choi ,  Ji-Eun Kim

IPC分类号： H05K1/11 ,  H05K3/06

CPC分类号： H05K1/11 ,  H05K3/06 ,  Y10T29/49144 ,  Y10T29/49156

摘要： A single layered printed circuit board and a method of manufacturing the same are disclosed. In accordance with an embodiment of the present invention, the method can include forming a bonding pad, a circuit pattern and a post on a surface of an insulation film, in which one end part of the post is electrically connected to at least a portion of the circuit pattern, pressing an insulator on the surface of the insulation film, in which the circuit pattern and the post are buried in the insulator, selectively etching the insulator such that the other end part of the post is exposed, and opening a portion of the insulation film such that at least a portion of the bonding pad is exposed.

摘要翻译： 公开了一种单层印刷电路板及其制造方法。 根据本发明的实施例，该方法可以包括在绝缘膜的表面上形成焊盘，电路图案和柱，其中柱的一个端部电连接到绝缘膜的至少一部分 电路图案，将电路图案和柱埋在绝缘体中的绝缘膜表面上的绝缘体按压绝缘体，选择性地蚀刻绝缘体，使得柱的另一端暴露，并且打开一部分 所述绝缘膜使得所述焊盘的至少一部分露出。