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公开(公告)号：US09667310B2
公开(公告)日：2017-05-30
申请号：US14923871
申请日：2015-10-27
申请人： NXP B.V.
发明人： Arie Geert Cornelis Koppelaar , Andries Pieter Hekstra , Frank Harald Erich Ho Chung Leong , Stefan Drude , Marinus van Splunter
CPC分类号： H04B1/7117 , H04B1/1081 , H04B1/712 , H04B1/71637 , H04B1/719
摘要： A receiver for receiving an input signal is disclosed. The receiver includes a processor, a memory, a plurality of sub-receivers configured to receive a plurality of versions of the input signal through a plurality of transmission channels, a sub-receiver selection module configured to select one more of the plurality of sub-receivers using expected contributions to signal-to-noise (SNR) of an output signal based on an uncertainty of the estimated contributions. The receiver also includes a combiner to combine outputs of the selected sub-receivers to produce the output signal.
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公开(公告)号：US20160226528A1
公开(公告)日：2016-08-04
申请号：US14983729
申请日：2015-12-30
申请人： NXP B.V.
CPC分类号： H03M13/45 , G06F11/1004 , H03M7/40 , H03M13/1111 , H03M13/23 , H03M13/2957 , H03M13/6502 , H03M13/6577 , H03M13/6588 , H03M13/6594 , H04L1/0045 , H04L1/0071 , H04L25/067
摘要： A method of processing a signal by non-uniform quantization of log likelihood ratios is disclosed. In particular a disclosed method comprising the steps of: receiving (110) a plurality of bits (12); calculating (120) a log likelihood ratio (22), known as a LLR, for each bit; providing (130) a LLR value (22) for each bit based on the calculated LLR; quantizing (140) the LLR values into a plurality of quantization bins, each quantization bin having: a width representative of one or more LLR values; and an index value (32) having a bit length; and associating (150) each bit with the index value (32) that corresponds to its LLR value (22), wherein the width of each quantization bin is non-uniform. This compresses the LLR values (22) in a more efficient manner, requiring lower memory usage and/or lower bandwidth. A chip for a receiver and a communication system comprising one or more receivers are also disclosed.
摘要翻译： 公开了通过对数似然比的非均匀量化处理信号的方法。 具体地，公开的方法包括以下步骤：接收（110）多个比特（12）; 计算（120）每个位的对数似然比（22），称为LLR; 基于所计算的LLR，为每个位提供（130）LLR值（22）; 将LLR值量化（140）到多个量化仓中，每个量化仓具有：表示一个或多个LLR值的宽度; 和具有位长度的索引值（32）; 以及将每个位与（150）对应于其LLR值（22）的索引值（32）相关联，其中每个量化仓的宽度是不均匀的。 这以更有效的方式压缩LLR值（22），需要较低的存储器使用和/或较低的带宽。 还公开了一种用于接收机的芯片和包括一个或多个接收机的通信系统。
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公开(公告)号：US10256846B2
公开(公告)日：2019-04-09
申请号：US14983729
申请日：2015-12-30
申请人： NXP B.V.
IPC分类号： H03M13/45 , H03M13/00 , G06F11/10 , H04L1/00 , H03M7/40 , H03M13/11 , H03M13/23 , H03M13/29 , H04L25/06
摘要： A method of processing a signal by non-uniform quantization of log likelihood ratios is disclosed. A method comprising the steps of: receiving a plurality of bits; calculating a log likelihood ratio, known as a LLR, for each bit; providing a LLR value for each bit based on the calculated LLR; quantizing the LLR values into a plurality of quantization bins, each quantization bin having: a width representative of one or more LLR values; and an index value having a bit length; and associating each bit with the index value that corresponds to its LLR value, wherein the width of each quantization bin is non-uniform. This compresses the LLR values in a more efficient manner, requiring lower memory usage and/or lower bandwidth. A chip for a receiver and a communication system comprising one or more receivers are also disclosed.
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公开(公告)号：US20180248738A1
公开(公告)日：2018-08-30
申请号：US15871542
申请日：2018-01-15
申请人： NXP B.V.
CPC分类号： H04L27/2695 , G01S13/0209 , G01S13/08 , G01S13/765 , G01S13/825 , G01S13/84 , G07C9/00309 , H04L27/2659 , H04L27/266 , H04L27/2662 , H04L27/2675 , H04L2027/0026 , H04L2027/0095
摘要： An apparatus is configured to, based on a first signal comprising one or more data transmission frames received from a first radio device by a second radio device. The first signal has a particular carrier frequency of a carrier wave thereof and the one or more data transmission frames comprising a plurality of symbols provided at a particular symbol frequency. The carrier frequency and symbol frequency based on a reference clock frequency of the first radio device. One or more of an estimate of the particular carrier frequency is determined and an estimate of the particular symbol frequency relative to a reference clock frequency of the second radio device and provide for transmission of a response signal from the second radio device to the first radio device.
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公开(公告)号：US10608718B2
公开(公告)日：2020-03-31
申请号：US16400324
申请日：2019-05-01
申请人： NXP B.V.
摘要： A first-transceiver system for use in an antenna diversity scheme. The first-transceiver system comprising: a first-receiver; a first-time/clock-generation-unit; a first-transmitter; and a timing-controller. The first-receiver is configured to receive a wireless first-common-signal from a third-party-transmitter, wherein the first-common-signal is representative of a common-signal transmitted by the third-party-transmitter. The timing-controller is configured to: receive signaling representative of the first-common-signal; receive signaling representative of a wireless second-common-signal as received at a second-transceiver, the wireless second-common-signal being representative of the common-signal; and generate a timing-signal based on the first-common-signal and the second-common-signal. The first-transceiver system is configured to set the first-time/clock-generation-unit, based on the timing-signal, to reduce an alignment-error between the first-time/clock-generation-unit and the second-time/clock-generation-unit. The first-transmitter is configured to transmit a wireless first-transmission-signal, in accordance with the first-time/clock-generation-unit, as part of the antenna diversity scheme that comprises aligned transmission of both the first-transmission-signal and a second-transmission-signal.
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公开(公告)号：US20190356366A1
公开(公告)日：2019-11-21
申请号：US16400324
申请日：2019-05-01
申请人： NXP B.V.
IPC分类号： H04B7/06
摘要： A first-transceiver system for use in an antenna diversity scheme. The first-transceiver system comprising: a first-receiver; a first-time/clock-generation-unit; a first-transmitter; and a timing-controller. The first-receiver is configured to receive a wireless first-common-signal from a third-party-transmitter, wherein the first-common-signal is representative of a common-signal transmitted by the third-party-transmitter. The timing-controller is configured to: receive signaling representative of the first-common-signal; receive signaling representative of a wireless second-common-signal as received at a second-transceiver, the wireless second-common-signal being representative of the common-signal; and generate a timing-signal based on the first-common-signal and the second-common-signal. The first-transceiver system is configured to set the first-time/clock-generation-unit, based on the timing-signal, to reduce an alignment-error between the first-time/clock-generation-unit and the second-time/clock-generation-unit. The first-transmitter is configured to transmit a wireless first-transmission-signal, in accordance with the first-time/clock-generation-unit, as part of the antenna diversity scheme that comprises aligned transmission of both the first-transmission-signal and a second-transmission-signal.
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公开(公告)号：US20170117934A1
公开(公告)日：2017-04-27
申请号：US14923871
申请日：2015-10-27
申请人： NXP B.V.
发明人： Arie Geert Cornelis Koppelaar , Andries Pieter Hekstra , Frank Harald Erich Ho Chung Leong , Stefan Drude , Marinus van Splunter
IPC分类号： H04B1/7117 , H04B1/10
CPC分类号： H04B1/7117 , H04B1/1081 , H04B1/712 , H04B1/71637 , H04B1/719
摘要： A receiver for receiving an input signal is disclosed. The receiver includes a processor, a memory, a plurality of sub-receivers configured to receive a plurality of versions of the input signal through a plurality of transmission channels, a sub-receiver selection module configured to select one more of the plurality of sub-receivers using expected contributions to signal-to-noise (SNR) of an output signal based on an uncertainty of the estimated contributions. The receiver also includes a combiner to combine outputs of the selected sub-receivers to produce the output signal.
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8.发明申请SYSTEM AND METHOD FOR VIDEO AND GRAPHIC COMPRESSION USING MULITPLE DIFFERENT COMPRESSION TECHNIQUES AND COMPRESSION ERROR FEEDBACK 审中-公开使用多种不同的压缩技术进行视频和图形压缩的系统和方法和压缩误差反馈公开(公告)号：US20140119435A1
公开(公告)日：2014-05-01
申请号：US14150512
申请日：2014-01-08
申请人： NXP B.V.
IPC分类号： H04N19/169 , H04N19/124
CPC分类号： H04N19/593 , H04N19/12 , H04N19/124 , H04N19/154 , H04N19/182 , H04N19/1887
摘要： A line-based one-dimensional system and method for video and graphic compression compresses an image data block that contains image data values from one or more neighboring pixels. The system and method involves compressing an image data sample of the image data block using multiple different compression techniques to generate multiple compression results, selecting one of the compression results, and compressing a next image data sample using the multiple different compression techniques and a compression error from the selected one of the compression results.
摘要翻译： 用于视频和图形压缩的基于线的一维系统和方法压缩包含来自一个或多个相邻像素的图像数据值的图像数据块。 该系统和方法包括使用多种不同的压缩技术来压缩图像数据块的图像数据样本以产生多个压缩结果，选择压缩结果之一，并使用多种不同的压缩技术压缩下一个图像数据样本和压缩误差 从所选的一个压缩结果。
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公开(公告)号：US11036657B2
公开(公告)日：2021-06-15
申请号：US16401609
申请日：2019-05-02
申请人： NXP B.V.
IPC分类号： G06F13/16
摘要： A writing-block for writing data to a memory-buffer, wherein the memory-buffer comprises an ordered sequence of elements and the writing-block is configured to: receive an input-data-stream; and write the input-data-stream to the memory-buffer in a successive manner from a first-element of the ordered sequence to a predetermined-element of the ordered sequence. Following writing to the predetermined-element the writing-block is configured to continue to write the input-data-stream to the memory-buffer in a successive manner restarting at the first-element. In response to writing the predetermined-element, the writing-block is configured to also continue to write the input-data-stream to the memory-buffer in a successive manner from an element immediately following the predetermined element until a second predetermined-element of the memory-buffer.
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公开(公告)号：US10574318B2
公开(公告)日：2020-02-25
申请号：US16400324
申请日：2019-05-01
申请人： NXP B.V.
摘要： A first-transceiver system for use in an antenna diversity scheme. The first-transceiver system comprising: a first-receiver; a first-time/clock-generation-unit; a first-transmitter; and a timing-controller. The first-receiver is configured to receive a wireless first-common-signal from a third-party-transmitter, wherein the first-common-signal is representative of a common-signal transmitted by the third-party-transmitter. The timing-controller is configured to: receive signaling representative of the first-common-signal; receive signaling representative of a wireless second-common-signal as received at a second-transceiver, the wireless second-common-signal being representative of the common-signal; and generate a timing-signal based on the first-common-signal and the second-common-signal. The first-transceiver system is configured to set the first-time/clock-generation-unit, based on the timing-signal, to reduce an alignment-error between the first-time/clock-generation-unit and the second-time/clock-generation-unit. The first-transmitter is configured to transmit a wireless first-transmission-signal, in accordance with the first-time/clock-generation-unit, as part of the antenna diversity scheme that comprises aligned transmission of both the first-transmission-signal and a second-transmission-signal.
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