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公开(公告)号:US07951673B2
公开(公告)日:2011-05-31
申请号:US12713432
申请日:2010-02-26
申请人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark L. Doczy , Matthew V. Metz , Justin K. Brask , Robert S. Chau , Mark Bohr , Anand S. Murthy
发明人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark L. Doczy , Matthew V. Metz , Justin K. Brask , Robert S. Chau , Mark Bohr , Anand S. Murthy
IPC分类号: H01L29/76
CPC分类号: H01L29/7833 , H01L29/1054 , H01L29/66545 , H01L29/66553 , H01L29/6656
摘要: A gate structure may be utilized as a mask to form source and drain regions. Then the gate structure may be removed to form a gap and spacers may be formed in the gap to define a trench. In the process of forming a trench into the substrate, a portion of the source drain region is removed. Then the substrate is filled back up with an epitaxial material and a new gate structure is formed thereover. As a result, more abrupt source drain junctions may be achieved.
摘要翻译: 栅极结构可以用作掩模以形成源区和漏区。 然后可以去除栅极结构以形成间隙,并且可以在间隙中形成间隔物以限定沟槽。 在将沟槽形成衬底的过程中,去除源极漏极区的一部分。 然后用外延材料填充衬底,并在其上形成新的栅极结构。 结果,可以实现更突然的源极漏极结。
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公开(公告)号:US20100151669A1
公开(公告)日:2010-06-17
申请号:US12713432
申请日:2010-02-26
申请人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark L. Doczy , Matthew V. Metz , Justin K. Brask , Robert S. Chau , Mark Bohr , Anand S. Murthy
发明人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark L. Doczy , Matthew V. Metz , Justin K. Brask , Robert S. Chau , Mark Bohr , Anand S. Murthy
IPC分类号: H01L21/28
CPC分类号: H01L29/7833 , H01L29/1054 , H01L29/66545 , H01L29/66553 , H01L29/6656
摘要: A gate structure may be utilized as a mask to form source and drain regions. Then the gate structure may be removed to form a gap and spacers may be formed in the gap to define a trench. In the process of forming a trench into the substrate, a portion of the source drain region is removed. Then the substrate is filled back up with an epitaxial material and a new gate structure is formed thereover. As a result, more abrupt source drain junctions may be achieved.
摘要翻译: 栅极结构可以用作掩模以形成源区和漏区。 然后可以去除栅极结构以形成间隙,并且可以在间隙中形成间隔物以限定沟槽。 在将沟槽形成衬底的过程中,去除源极漏极区的一部分。 然后用外延材料填充衬底,并在其上形成新的栅极结构。 结果,可以实现更突然的源极漏极结。
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公开(公告)号:US07704833B2
公开(公告)日:2010-04-27
申请号:US10925566
申请日:2004-08-25
申请人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark L. Doczy , Matthew V. Metz , Justin K. Brask , Robert S. Chau , Mark Bohr , Anand S. Murthy
发明人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark L. Doczy , Matthew V. Metz , Justin K. Brask , Robert S. Chau , Mark Bohr , Anand S. Murthy
IPC分类号: H01L29/76
CPC分类号: H01L29/7833 , H01L29/1054 , H01L29/66545 , H01L29/66553 , H01L29/6656
摘要: A gate structure may be utilized as a mask to form source and drain regions. Then the gate structure may be removed to form a gap and spacers may be formed in the gap to define a trench. In the process of forming a trench into the substrate, a portion of the source drain region is removed. Then the substrate is filled back up with an epitaxial material and a new gate structure is formed thereover. As a result, more abrupt source drain junctions may be achieved.
摘要翻译: 栅极结构可以用作掩模以形成源区和漏区。 然后可以去除栅极结构以形成间隙,并且可以在间隙中形成间隔物以限定沟槽。 在将沟槽形成衬底的过程中,去除源极漏极区的一部分。 然后用外延材料填充衬底,并在其上形成新的栅极结构。 结果,可以实现更突然的源极漏极结。
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公开(公告)号:US20060046399A1
公开(公告)日:2006-03-02
申请号:US10925566
申请日:2004-08-25
申请人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark Doczy , Matthew Metz , Justin Brask , Robert Chau , Mark Bohr , Anand Murthy
发明人: Nick Lindert , Suman Datta , Jack Kavalieros , Mark Doczy , Matthew Metz , Justin Brask , Robert Chau , Mark Bohr , Anand Murthy
IPC分类号: H01L21/336
CPC分类号: H01L29/7833 , H01L29/1054 , H01L29/66545 , H01L29/66553 , H01L29/6656
摘要: A gate structure may be utilized as a mask to form source and drain regions. Then the gate structure may be removed to form a gap and spacers may be formed in the gap to define a trench. In the process of forming a trench into the substrate, a portion of the source drain region is removed. Then the substrate is filled back up with an epitaxial material and a new gate structure is formed thereover. As a result, more abrupt source drain junctions may be achieved.
摘要翻译: 栅极结构可以用作掩模以形成源区和漏区。 然后可以去除栅极结构以形成间隙,并且可以在间隙中形成间隔物以限定沟槽。 在将沟槽形成衬底的过程中,去除源极漏极区的一部分。 然后用外延材料填充衬底,并在其上形成新的栅极结构。 结果,可以实现更突然的源极漏极结。
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公开(公告)号:US08174060B2
公开(公告)日:2012-05-08
申请号:US13040951
申请日:2011-03-04
申请人: Giuseppe Curello , Ian R. Post , Chia-Hong Jan , Mark Bohr
发明人: Giuseppe Curello , Ian R. Post , Chia-Hong Jan , Mark Bohr
IPC分类号: H01L31/119 , H01L21/8238
CPC分类号: H01L29/7843 , H01L21/823807 , H01L21/823864 , H01L29/6653 , H01L29/6656 , H01L29/78
摘要: A method of selectively forming a spacer on a first class of transistors and devices formed by such methods. The method can include depositing a conformal first deposition layer on a substrate with different classes of transistors situated thereon, depositing a blocking layer to at least one class of transistors, dry etching the first deposition layer, removing the blocking layer, depositing a conformal second deposition layer on the substrate, dry etching the second deposition layer and wet etching the remaining first deposition layer. Devices may include transistors of a first class with larger spacers compared to spacers of transistors of a second class.
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公开(公告)号:US20110084387A1
公开(公告)日:2011-04-14
申请号:US12973615
申请日:2010-12-20
申请人: Valery M. Dubin , Sridhar Balakrishnan , Mark Bohr
发明人: Valery M. Dubin , Sridhar Balakrishnan , Mark Bohr
IPC分类号: H01L23/482
CPC分类号: H01L24/13 , H01L21/288 , H01L21/4853 , H01L24/05 , H01L24/11 , H01L2224/0401 , H01L2224/05124 , H01L2224/1145 , H01L2224/11452 , H01L2224/11462 , H01L2224/11464 , H01L2224/11614 , H01L2224/13026 , H01L2224/13084 , H01L2224/13099 , H01L2224/13111 , H01L2224/13113 , H01L2224/1312 , H01L2224/13139 , H01L2224/13147 , H01L2224/13166 , H01L2224/13564 , H01L2224/13611 , H01L2224/13639 , H01L2224/13647 , H01L2224/29111 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/01051 , H01L2924/01057 , H01L2924/01058 , H01L2924/01074 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/04941 , H01L2924/14 , H01L2924/3011 , H01L2924/351 , H01L2924/35121 , H01L2924/3651 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要: Methods, techniques, and structures relating to die packaging. In one exemplary implementation, a die package interconnect structure includes a semiconductor substrate and a first conducting layer in contact with the semiconductor substrate. The first conducting layer may include a base layer metal. The base layer metal may include Cu. The exemplary implementation may also include a diffusion barrier in contact with the first conducting layer and a wetting layer on top of the diffusion barrier. A bump layer may reside on top of the wetting layer, in which the bump layer may include Sn, and Sn may be electroplated. The diffusion barrier may be electroless and may be adapted to prevent Cu and Sn from diffusing through the diffusion barrier. Furthermore, the diffusion barrier may be further adapted to suppress a whisker-type formation in the bump layer.
摘要翻译: 与模具包装相关的方法,技术和结构。 在一个示例性实施例中,管芯封装互连结构包括半导体衬底和与半导体衬底接触的第一导电层。 第一导电层可以包括基底层金属。 基底层金属可以包括Cu。 示例性实施方式还可以包括与第一导电层接触的扩散阻挡层和在扩散阻挡层顶部的润湿层。 凸起层可以驻留在润湿层的顶部,其中凸起层可以包括Sn,并且Sn可以被电镀。 扩散阻挡层可以是无电解的并且可以适于防止Cu和Sn扩散通过扩散阻挡层。 此外,扩散阻挡层可以进一步适于抑制凸块层中的晶须型形成。
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公开(公告)号:US07510927B2
公开(公告)日:2009-03-31
申请号:US10330842
申请日:2002-12-26
申请人: Mark Bohr , Julie Tsai
发明人: Mark Bohr , Julie Tsai
IPC分类号: H01L21/84
CPC分类号: H01L21/76264
摘要: The present invention discloses a method including: providing a substrate; forming a buried oxide layer over the substrate; forming a thin silicon body layer over the buried oxide layer, the thin silicon body layer having a thickness of 3-40 nanometers; forming a pad oxide layer over the thin silicon body layer; forming a silicon nitride layer over the pad oxide layer; forming a photoresist over the silicon nitride layer; forming an opening in the photoresist; removing the silicon nitride layer in the opening; partially or completely removing the pad oxide layer in the opening; removing the photoresist over the silicon nitride layer; forming a field oxide layer from the thin silicon body layer in the opening; removing the silicon nitride layer over the pad oxide layer; and removing the pad oxide layer over the thin silicon body layer.The present invention also discloses a structure including: a substrate; a buried oxide layer located over the substrate; a thin silicon body layer located over the buried oxide layer, the thin silicon body layer including active areas separated by isolation regions, the isolation regions having a modified bird's beak length that is 30-60% of a thickness of the thin silicon body layer; and a fully-depleted device located in each of the active regions.
摘要翻译: 本发明公开了一种方法,包括:提供基板; 在衬底上形成掩埋氧化层; 在所述掩埋氧化物层上形成薄的硅体层,所述薄硅体层的厚度为3-40纳米; 在所述薄硅体层上形成衬垫氧化物层; 在所述焊盘氧化物层上形成氮化硅层; 在氮化硅层上形成光致抗蚀剂; 在光致抗蚀剂中形成开口; 去除开口中的氮化硅层; 部分地或完全地去除开口中的垫氧化物层; 去除氮化硅层上的光致抗蚀剂; 从所述开口中的所述薄硅体层形成场氧化物层; 去除所述衬垫氧化物层上的所述氮化硅层; 以及去除所述薄硅体层上的所述衬垫氧化物层。 本发明还公开了一种结构,包括:基板; 位于衬底上方的掩埋氧化物层; 位于所述掩埋氧化物层上方的薄硅体层,所述薄硅体层包括由隔离区隔开的有效区域,所述隔离区域具有所述薄硅体层的厚度的30-60%的改进的鸟嘴长度; 以及位于每个活动区域中的完全耗尽的装置。
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公开(公告)号:US20080119016A1
公开(公告)日:2008-05-22
申请号:US12023867
申请日:2008-01-31
申请人: Valery Dubin , Mark Bohr
发明人: Valery Dubin , Mark Bohr
IPC分类号: H01L21/768 , H01L21/4763
CPC分类号: H01L29/76 , B82Y10/00 , H01L21/768 , H01L21/76879 , H01L21/76897 , H01L23/485 , H01L23/53276 , H01L29/66439 , H01L29/7613 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要: Embodiments of methods in accordance with the present invention provide three-dimensional carbon nanotube (CNT) integrated circuits comprising layers of arrays of CNT's separated by dielectric layers with conductive traces formed within the dielectric layers to electrically interconnect individual CNT's. The methods to fabricate three-dimensional carbon nanotube FET integrated circuits include the selective deposition of carbon nanotubes onto catalysts selectively formed on a conductive layer at the bottom of openings in a dielectric layer. The openings in the dielectric layer are formed using suitable techniques, such as, but not limited to, dielectric etching, and the formation of ring gate electrodes, including spacers, that provide openings for depositing self-aligned carbon nanotube semiconductor channels.
摘要翻译: 根据本发明的方法的实施例提供了三维碳纳米管(CNT)集成电路,其包括由电介质层分离的CNT阵列层,其中形成有介电层内的导电迹线以电连接各个CNT。 制造三维碳纳米管FET集成电路的方法包括将碳纳米管选择性沉积到选择性地形成在电介质层的开口底部的导电层上的催化剂上。 电介质层中的开口使用合适的技术形成,例如但不限于电介质蚀刻,以及形成包括间隔物的环形栅电极,其提供用于沉积自对准碳纳米管半导体通道的开口。
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公开(公告)号:US07348675B2
公开(公告)日:2008-03-25
申请号:US11048231
申请日:2005-02-01
申请人: Valery M. Dubin , Mark Bohr
发明人: Valery M. Dubin , Mark Bohr
CPC分类号: H01L29/76 , B82Y10/00 , H01L21/768 , H01L21/76879 , H01L21/76897 , H01L23/485 , H01L23/53276 , H01L29/66439 , H01L29/7613 , H01L2221/1094 , H01L2924/0002 , H01L2924/00
摘要: Embodiments of methods in accordance with the present invention provide three-dimensional carbon nanotube (CNT) integrated circuits comprising layers of arrays of CNT's separated by dielectric layers with conductive traces formed within the dielectric layers to electrically interconnect individual CNT's. The methods to fabricate three-dimensional carbon nanotube FET integrated circuits include the selective deposition of carbon nanotubes onto catalysts selectively formed on a conductive layer at the bottom of openings in a dielectric layer. The openings in the dielectric layer are formed using suitable techniques, such as, but not limited to, dielectric etching, and the formation of ring gate electrodes, including spacers, that provide openings for depositing self-aligned carbon nanotube semiconductor channels.
摘要翻译: 根据本发明的方法的实施例提供了三维碳纳米管(CNT)集成电路,其包括由电介质层分离的CNT阵列层,其中形成有介电层内的导电迹线以电连接各个CNT。 制造三维碳纳米管FET集成电路的方法包括将碳纳米管选择性沉积到选择性地形成在电介质层的开口底部的导电层上的催化剂上。 电介质层中的开口使用合适的技术形成,例如但不限于电介质蚀刻,以及形成包括间隔物的环形栅电极,其提供用于沉积自对准碳纳米管半导体通道的开口。
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公开(公告)号:US20070273042A1
公开(公告)日:2007-11-29
申请号:US11396201
申请日:2006-05-23
申请人: Kelin J. Kuhn , Kaizad Mistry , Mark Bohr , Chris Auth
发明人: Kelin J. Kuhn , Kaizad Mistry , Mark Bohr , Chris Auth
IPC分类号: H01L23/48
CPC分类号: H01L29/41725 , H01L21/76843 , H01L21/76856 , H01L21/76859 , H01L21/76874 , H01L23/485 , H01L23/5226 , H01L29/456 , H01L29/66477 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要: Methods of fabricating a first contact to a semiconductor device, which fundamentally comprises providing a semiconductor device formed on a substrate. The substrate further includes a conductive surface. A dielectric layer is formed over the substrate and has an opening exposing the conductive surface. The opening extends an entire length of the semiconductor device, partway down the entire length of the device, extending from the device onto adjacent field of the device, or and a combination thereof. A barrier layer is formed within the opening. A copper containing material fills the opening to form a first contact to the semiconductor device.
摘要翻译: 制造半导体器件的第一接触的方法,其基本上包括提供形成在衬底上的半导体器件。 基板还包括导电表面。 介电层形成在衬底上并具有暴露导电表面的开口。 开口延伸半导体器件的整个长度,从设备的整个长度的一部分延伸到器件的相邻的场上,或其组合。 在开口内形成阻挡层。 含铜材料填充开口以形成与半导体器件的第一接触。
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