公开(公告)号：US20120020042A1

公开(公告)日：2012-01-26

申请号：US12840861

申请日：2010-07-21

申请人： Nickolaus J. Gruendler ,  Paul M. Harvey ,  Tae Hong Kim ,  Sang Y. Lee ,  Michael J. Shapiro

发明人： Nickolaus J. Gruendler ,  Paul M. Harvey ,  Tae Hong Kim ,  Sang Y. Lee ,  Michael J. Shapiro

IPC分类号： H05K7/02 ,  H05K3/30 ,  H05K3/34 ,  H05K1/16

CPC分类号： G01L9/12 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/1531 ,  H01L2924/3025 ,  H05K1/0228 ,  H05K1/0231 ,  H05K1/0251 ,  Y10T29/49139 ,  Y10T29/49142

摘要： One or more decoupling capacitors are coupled to a low inductance mount that is connected to the bottom layer of a printed circuit board (PCB) on which a semiconductor module is mounted. The low inductance mount includes a magnetic planar structure with vias that are coupled to the one or more decoupling capacitors and to like vias positioned on the PCB.

摘要翻译： 一个或多个去耦电容器耦合到低电感安装座，该低电感安装件连接到其上安装有半导体模块的印刷电路板（PCB）的底层。 低电感安装座包括磁性平面结构，其具有耦合到一个或多个去耦电容器的过孔以及位于PCB上的相似通孔。

公开(公告)号：US08631706B2

公开(公告)日：2014-01-21

申请号：US12840861

申请日：2010-07-21

申请人： Nickolaus J Gruendler ,  Paul M Harvey ,  Tae Hong Kim ,  Sang Y Lee ,  Michael J Shapiro

发明人： Nickolaus J Gruendler ,  Paul M Harvey ,  Tae Hong Kim ,  Sang Y Lee ,  Michael J Shapiro

IPC分类号： G01L9/12 ,  H01R9/00 ,  H05K7/20

CPC分类号： G01L9/12 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2924/1531 ,  H01L2924/3025 ,  H05K1/0228 ,  H05K1/0231 ,  H05K1/0251 ,  Y10T29/49139 ,  Y10T29/49142

摘要： One or more decoupling capacitors are coupled to a low inductance mount that is connected to the bottom layer of a printed circuit board (PCB) on which a semiconductor module is mounted. The low inductance mount includes a magnetic planar structure with vias that are coupled to the one or more decoupling capacitors and to like vias positioned on the PCB.

摘要翻译： 一个或多个去耦电容器耦合到低电感安装座，该低电感安装件连接到其上安装有半导体模块的印刷电路板（PCB）的底层。 低电感安装座包括磁性平面结构，其具有耦合到一个或多个去耦电容器的过孔以及位于PCB上的相似通孔。

公开(公告)号：US20130021739A1

公开(公告)日：2013-01-24

申请号：US13187074

申请日：2011-07-20

申请人： Tae Hong Kim ,  Sang Y. Lee

发明人： Tae Hong Kim ,  Sang Y. Lee

IPC分类号： G06F1/16 ,  H05K3/36 ,  H05K1/11

CPC分类号： H05K1/0227 ,  H05K1/0243 ,  H05K2201/093 ,  H05K2201/09309 ,  H05K2201/09345 ,  H05K2201/09663 ,  Y10T29/49126

摘要： Multi-layer printed circuit boards (PCB) with power plane islands to isolate noise coupling are provided. In addition, methods and computer program products for manufacturing multi-layer PCBs with power plane islands to isolate noise coupling are provided. Embodiments include a PCB comprising a first power plane coupled to a power supply, the first power plane within a layer of the PCB; a second power plane and a third power plane, the second power plane and the third power plane within another layer of the PCB, the second power plane and the third power plane separated from each other within the other layer of the PCB; and a via bridge structure connecting the first power plane to both the second power plane and the third power plane.

摘要翻译： 提供了具有电源平面岛以隔离噪声耦合的多层印刷电路板（PCB）。 此外，还提供了用于制造具有电源平面岛以隔离噪声耦合的多层PCB的方法和计算机程序产品。 实施例包括PCB，其包括耦合到电源的第一电力平面，PCB内的第一电力平面; 第二电力平面和第三电力平面，PCB的另一层内的第二电力平面和第三电力平面，第二电力平面和第三电力平面在PCB的另一层内彼此分离; 以及将第一电力平面连接到第二电力平面和第三电力平面的通孔桥结构。

公开(公告)号：US20110273855A1

公开(公告)日：2011-11-10

申请号：US12776888

申请日：2010-05-10

申请人： Tae Hong Kim ,  Sang Y. Lee ,  Nam H. Pham

发明人： Tae Hong Kim ,  Sang Y. Lee ,  Nam H. Pham

IPC分类号： H05K7/00 ,  H05K1/16 ,  H05K3/10 ,  H05K1/11

CPC分类号： H05K3/40 ,  H01L2224/16225 ,  H01L2924/19105 ,  H05K1/0265 ,  H05K1/115 ,  H05K2201/09854 ,  Y10T29/49155 ,  Y10T29/49165

摘要： A system for providing power and ground vias for power distributions systems includes first and second conductive layers on a microelectronic package. The conductive layers may include one or more conductive components such as, but not limited to, power planes, ground planes, pads, traces, and the like for electrically connecting to electronic components. A via may electrically connect the first and second conductive layers. The via may have a cross-section of at least three partially-overlapping shapes. Each of the shapes partially overlaps at least two of the other shapes. The shapes may be, for example, circular, triangular, rectangular, square, polygonal, rhomboidal shape, or any other shape.

摘要翻译： 用于为功率分配系统提供电源和接地通孔的系统包括微电子封装上的第一和第二导电层。 导电层可以包括一个或多个导电部件，例如但不限于用于电连接到电子部件的电源平面，接地平面，焊盘，迹线等。 通孔可以电连接第一和第二导电层。 通孔可以具有至少三个部分重叠形状的横截面。 每个形状部分地与至少两个其他形状重叠。 形状可以是例如圆形，三角形，矩形，正方形，多边形，菱形或任何其它形状。

公开(公告)号：US08558345B2

公开(公告)日：2013-10-15

申请号：US12614883

申请日：2009-11-09

申请人： Tae Hong Kim ,  Edmund J. Sprogis ,  Michael F. McAllister ,  Michael J. Shapiro

发明人： Tae Hong Kim ,  Edmund J. Sprogis ,  Michael F. McAllister ,  Michael J. Shapiro

IPC分类号： H01L27/108 ,  H01L29/94 ,  H01L23/04 ,  H01L21/02

CPC分类号： H01L28/40 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/642 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00

摘要： A capacitor in a semiconductor substrate employs a conductive through-substrate via (TSV) as an inner electrode and a columnar doped semiconductor region as an outer electrode. The capacitor provides a large decoupling capacitance in a small area, and does not impact circuit density or a Si3D structural design. Additional conductive TSV's can be provided in the semiconductor substrate to provide electrical connection for power supplies and signal transmission therethrough. The capacitor has a lower inductance than a conventional array of capacitors having comparable capacitance, thereby enabling reduction of high frequency noise in the power supply system of stacked semiconductor chips.

摘要翻译： 半导体衬底中的电容器采用导电贯穿衬底通孔（TSV）作为内部电极和柱状掺杂半导体区域作为外部电极。 电容器在小面积上提供大的去耦电容，并且不影响电路密度或Si3D结构设计。 可以在半导体衬底中提供附加的导电TSV，以提供用于电源和通过其的信号传输的电连接。 电容器具有比具有相当电容的传统电容器阵列更低的电感，从而能够降低层叠半导体芯片的电源系统中的高频噪声。

公开(公告)号：US20110108948A1

公开(公告)日：2011-05-12

申请号：US12614883

申请日：2009-11-09

申请人： Tae Hong Kim ,  Edmund J. Sprogis ,  Michael F. McAllister ,  Michael J. Shapiro

发明人： Tae Hong Kim ,  Edmund J. Sprogis ,  Michael F. McAllister ,  Michael J. Shapiro

IPC分类号： H01L29/92 ,  H01L21/02 ,  H01L21/768

CPC分类号： H01L28/40 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L23/642 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12044 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00

摘要： A capacitor in a semiconductor substrate employs a conductive through-substrate via (TSV) as an inner electrode and a columnar doped semiconductor region as an outer electrode. The capacitor provides a large decoupling capacitance in a small area, and does not impact circuit density or a Si3D structural design. Additional conductive TSV's can be provided in the semiconductor substrate to provide electrical connection for power supplies and signal transmission therethrough. The capacitor has a lower inductance than a conventional array of capacitors having comparable capacitance, thereby enabling reduction of high frequency noise in the power supply system of stacked semiconductor chips.

摘要翻译： 半导体衬底中的电容器采用导电贯穿衬底通孔（TSV）作为内部电极和柱状掺杂半导体区域作为外部电极。 电容器在小面积上提供大的去耦电容，并且不影响电路密度或Si3D结构设计。 可以在半导体衬底中提供附加的导电TSV，以提供用于电源和通过其的信号传输的电连接。 电容器具有比具有相当电容的传统电容器阵列更低的电感，从而能够降低层叠半导体芯片的电源系统中的高频噪声。

公开(公告)号：US08975525B2

公开(公告)日：2015-03-10

申请号：US13614314

申请日：2012-09-13

申请人： Kevin Bills ,  Mahesh Bohra ,  Jinwoo Choi ,  Tae Hong Kim ,  Rohan Mandrekar

发明人： Kevin Bills ,  Mahesh Bohra ,  Jinwoo Choi ,  Tae Hong Kim ,  Rohan Mandrekar

IPC分类号： H05K1/00 ,  H05K1/02 ,  H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49822 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16152 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/024 ,  H05K1/0251 ,  H05K1/113 ,  H05K1/144 ,  H05K2201/0187 ,  H05K2201/041 ,  H05K2201/09481 ,  H05K2201/09718 ,  H05K2201/10734 ,  Y10T29/49124 ,  Y10T29/49151 ,  H01L2924/00

摘要： A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

摘要翻译： 多层互连衬底具有至少两个间隔开的金属层，每个金属层上具有导电焊盘。 在金属层之间放置两种不同类型的绝缘层。 这种放置使得两种不同类型的绝缘层中的一种被放置在导电焊盘之间，另一种类型的绝缘层被放置在两个间隔开的金属层之间。

公开(公告)号：US20140332708A1

公开(公告)日：2014-11-13

申请号：US14361501

申请日：2012-11-16

申请人： Byoung Hee Son ,  Tae Hong Kim ,  Il Yong Lee

发明人： Byoung Hee Son ,  Tae Hong Kim ,  Il Yong Lee

IPC分类号： C08B13/00

CPC分类号： C08B13/00 ,  C08B3/06 ,  C08B11/04 ,  C08B11/08 ,  C08B11/20 ,  C08J5/18 ,  C08J2301/32 ,  C08L1/12 ,  C08L1/28 ,  C08L1/284 ,  C08L1/32 ,  D01F2/28

摘要： Disclosed are acetylated cellulose ether, a method of preparing the same, and an article including the same. The disclosed acetylated cellulose ether has a degree of substitution (DS) of alkyl group of 1 to 2, a molar substitution (MS) of hydroxyalkyl group of 0 to 1, and a degree of substitution (DS) of acetyl group of 1 to 2; and a bulk density of 0.1 to 0.4.

摘要翻译： 公开了乙酰化纤维素醚，其制备方法和包含该乙酰化纤维素醚的制品。 所公开的乙酰化纤维素醚具有烷基的取代度（DS）为1至2，羟基烷基的摩尔取代度（MS）为0至1，乙酰基的取代度（DS）为1至2 ; 体积密度为0.1〜0.4。

公开(公告)号：US08658911B2

公开(公告)日：2014-02-25

申请号：US13448787

申请日：2012-04-17

申请人： Moises Cases ,  Tae Hong Kim ,  Rohan U. Mandrekar ,  Nusrat I. Sherali

发明人： Moises Cases ,  Tae Hong Kim ,  Rohan U. Mandrekar ,  Nusrat I. Sherali

IPC分类号： H05K1/11

CPC分类号： H05K3/0094 ,  H05K1/0234 ,  H05K1/0242 ,  H05K1/0251 ,  H05K1/09 ,  H05K1/167 ,  H05K3/0047 ,  H05K3/244 ,  H05K3/429 ,  H05K2201/0391 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1057 ,  Y10T428/12528

摘要： Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

摘要翻译： 描述了例如多层印刷电路板（“PCB”），以及制造和使用这种包括层压层的PCB​​的方法; 穿过层压体层的至少一个通孔，以及包含在通孔内的通孔导体，所述通孔导体包括使用部分和未使用部分，所述通孔导体包括涂覆有电导率低于 铜。

公开(公告)号：US08242384B2

公开(公告)日：2012-08-14

申请号：US12570029

申请日：2009-09-30

申请人： Moises Cases ,  Tae Hong Kim ,  Rohan U. Mandrekar ,  Nusrat I. Sherali

发明人： Moises Cases ,  Tae Hong Kim ,  Rohan U. Mandrekar ,  Nusrat I. Sherali

IPC分类号： H05K1/11

CPC分类号： H05K3/0094 ,  H05K1/0234 ,  H05K1/0242 ,  H05K1/0251 ,  H05K1/09 ,  H05K1/167 ,  H05K3/0047 ,  H05K3/244 ,  H05K3/429 ,  H05K2201/0391 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/49165 ,  Y10T156/1057 ,  Y10T428/12528

摘要： Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of making and using such PCBs that include layers of laminate; at least one via hole traversing the layers of laminate, and a via conductor contained within the via hole, the via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a metal having a conductivity lower than the conductivity of copper.

摘要翻译： 描述了例如多层印刷电路板（“PCB”），以及制造和使用这种包括层压层的PCB​​的方法; 穿过层压体层的至少一个通孔，以及包含在通孔内的通孔导体，所述通孔导体包括使用部分和未使用部分，所述通孔导体包括涂覆有电导率低于 铜。