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1.发明授权
公开(公告)号：US4653052A
公开(公告)日：1987-03-24
申请号：US750513
申请日：1985-07-01
申请人： Nobukazu Doi , Morishi Izumita , Seiichi Mita , Yoshizumi Eto , Morito Rokuda
发明人： Nobukazu Doi , Morishi Izumita , Seiichi Mita , Yoshizumi Eto , Morito Rokuda
CPC分类号： H03M13/29
摘要： The present invention relates to a method and an apparatus for decoding double-encoding codes in which the information to be decoded comprises a first data and a second data. The operation for decoding double-encoding codes is achieved through two stages. A decoder of the first stage checks the first data, and when an error is found in the first data, all symbols of the first data are assumed to be wrong. The first-stage decoder then adds an erasure flag to all symbols to generate erasure symbols. As a result, these erasure symbols include the symbols which are actually erroneous and those which are correct. A decoder of the second stage is used to perform an error correction on the second data. For this purpose, the second-stage decoder detects the number of erasure symbols which are contained in the second data and which are actually erroneous. If the number of actually erroneous symbols does not exceed the maximum number of correctable symbols which can be corrected by the decoder of the second stage, the error correction is effected; otherwise, the decoder detects an error without conducting the error correction.
摘要翻译： 本发明涉及一种用于解码双重编码码的方法和装置，其中待解码的信息包括第一数据和第二数据。 双编码解码操作通过两个阶段实现。 第一级的解码器检查第一数据，并且当在第一数据中发现错误时，假定第一数据的所有符号是错误的。 然后，第一级解码器将擦除标志添加到所有符号以产生擦除符号。 结果，这些擦除符号包括实际上是错误的符号和正确的符号。 第二级的解码器用于对第二数据执行纠错。 为此，第二级解码器检测包含在第二数据中并且实际上是错误的擦除符号的数量。 如果实际错误符号的数量不超过可由第二级的解码器校正的可校正符号的最大数目，则进行纠错; 否则，解码器在不进行纠错的情况下检测到错误。
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公开(公告)号：US4682115A
公开(公告)日：1987-07-21
申请号：US742792
申请日：1985-06-10
申请人： Seiichi Mita , Morishi Izumita , Yuichi Michikawa , Hitoshi Katayama , Hiroshi Shiono , Hitoshi Takagi , Morito Rokuda , Nobukazu Doi
发明人： Seiichi Mita , Morishi Izumita , Yuichi Michikawa , Hitoshi Katayama , Hiroshi Shiono , Hitoshi Takagi , Morito Rokuda , Nobukazu Doi
摘要： An apparatus for regenerating original signals comprising: means for introducing a first signal that is produced as an original signal passes through a system that cuts off predetermined frequencies; a first circuit means which produces a third signal obtained on an open loop responsive to said first signal and a second signal which is regenerated from a signal of a predetermined frequency that is cut off by said system; and a second circuit means which regenerates the original signal by converting said third signal into a binary signal.
摘要翻译： 一种用于再生原始信号的装置，包括：用于引入作为原始信号产生的第一信号的装置通过切断预定频率的系统; 第一电路装置，其响应于所述第一信号产生在开环上获得的第三信号，以及从由所述系统切断的预定频率的信号再生的第二信号; 以及通过将所述第三信号转换成二进制信号来再生原始信号的第二电路装置。
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3.发明授权Adaptive transform encoder for digital image signal in recording/reproducing apparatus 失效用于记录/再现装置中的数字图像信号的自适应变换编码器
公开(公告)号：US5047852A
公开(公告)日：1991-09-10
申请号：US375727
申请日：1989-07-05
申请人： Hiroyuki Hanyu , Nobukazu Doi , Seiichi Mita , Morishi Izumita , Yoshizumi Eto
发明人： Hiroyuki Hanyu , Nobukazu Doi , Seiichi Mita , Morishi Izumita , Yoshizumi Eto
IPC分类号： G06T9/00 , H03M7/30 , H03M7/38 , H04N1/41 , H04N5/926 , H04N19/00 , H04N19/115 , H04N19/126 , H04N19/134 , H04N19/136 , H04N19/14 , H04N19/176 , H04N19/186 , H04N19/189 , H04N19/196 , H04N19/46 , H04N19/59 , H04N19/60 , H04N19/625 , H04N19/70 , H04N19/85
CPC分类号： H04N5/9264 , H04N19/115 , H04N19/124 , H04N19/14 , H04N19/149 , H04N19/154 , H04N19/176 , H04N19/18 , H04N19/184 , H04N19/60 , H04N19/13 , H04N19/146 , H04N19/91
摘要： An adaptive transform encoder can keep a recording rate of a digital signal at a constant level. It comprises a unit for orthogonal-transforming one block of digital input signal, a unit for calculating an activity index of the orthogonal-transformed block, a unit for comparing the activity index of the block with a predetermined reference, a unit for classifying the block to a standard bit class having a predetermined number of bits when the activity index of the block is equal to the reference, classifying the block to a low bit class having a smaller number of bits than the predetermined number of bits of the standard bit class when the activity index of the block is smaller than the reference, and classifying the block to a high bit class having a larger number of bits than the predetermined number of bits of the standard bit class when the activity index is larger than the reference, a quantization unit for quantizing the input signal of the block with the number of bits designated by the bit class, a unit for selecting the block of the low bit class from the quantized blocks, an allocation unit for adding to the selected block of the low bit class the data having more bits than the number of bits of the standard bit class of the block of the quantized high bit class, and an encoder unit for encoding the quantized block signal.
摘要翻译： 自适应变换编码器可以将数字信号的记录速率保持在恒定水平。 它包括用于正交变换一个数字输入信号块的单元，用于计算正交变换块的活动索引的单元，用于将块的活动性指数与预定参考进行比较的单元，用于对块进行分类的单元 当块的活动索引等于参考时，将具有预定比特数的标准比特类分类为具有比标准比特类的预定比特数少的比特数比特的低比特级， 该块的活动指数小于参考值，并且当活动指数大于参考值时，将块分类为具有比标准比特类的预定比特数大的比特数的比特数较大的高比特级，量化 用于通过由位类别指定的比特数量量化块的输入信号的单元，用于从量化块中选择低比特等级的块的单元 分配单元，用于向所选择的低位类别的块添加比量化高位类别的块的标准位类别的位数多的位的数据，以及用于对量化块信号进行编码的编码器单元 。
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公开(公告)号：US4983965A
公开(公告)日：1991-01-08
申请号：US444845
申请日：1989-12-04
申请人： Nobukazu Doi , Morishi Izumita , Seiichi Mita , Yoshizumi Eto
发明人： Nobukazu Doi , Morishi Izumita , Seiichi Mita , Yoshizumi Eto
CPC分类号： H03M5/14
摘要： An original digital signal is converted into either a Miller-squared code signal or a Miller code signal, and undergoes serial-to-parallel conversion to produce n-phase signals (where n is desired to be a positive even number). N-phase virtual demodulated signals are simultaneously generated at clock timing having a period equivalent to 1/n times the period of the transmission clock. Out of the n-phase virtual demodulated signals, n/2 phases are selected to undergo parallel-to-serial conversion, the original digital signal being thus obtained.
摘要翻译： 原始数字信号被转换成米勒平方码信号或米勒码信号，并进行串并转换以产生n相信号（其中n希望为正偶数）。 在具有相当于传输时钟的周期的1 / n倍的周期的时钟定时处同时产生N相虚拟解调信号。 在n相虚拟解调信号中，选择n / 2相进行并行到串行转换，从而获得原始数字信号。
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5.发明授权Apparatus for recording/reproducing digital video signals in both a standard mode and a long playing mode 失效用于在标准模式和长播放模式下记录/再现数字视频信号的装置
公开(公告)号：US4963992A
公开(公告)日：1990-10-16
申请号：US301462
申请日：1989-01-26
摘要： An apparatus for recording an reproducing a digital video signal is disclosed which includes n sampling circuits each for performing a sub-Nyquist sampling operation for the digital video signal in such a manner that the amount of data is reduced to one-n-th of an original amount (where n is a positive integer) and a pixel sampled by the sub-Nyquist sampling operation is not sampled by the remaining sampling circuits, recording/reproducing means for recording and reproducing information at all or part of pixels which are sampled by the n sampling circuits and a device for reconstructing the digital video signal from reproduced information at pixels with the aid of a synthesizing technique or interpolation technique.
摘要翻译： 公开了一种用于记录再现数字视频信号的装置，其包括n个采样电路，每个采样电路用于对数字视频信号执行子奈奎斯特采样操作，使得数据量减少到数字视频信号的1 / 原始量（其中n是正整数）和通过亚奈奎斯特采样操作采样的像素不被剩余的采样电路采样，用于在全部或部分像素记录和再现信息的记录/再现装置 n个采样电路和用于通过合成技术或插值技术在像素处从再现信息重构数字视频信号的装置。
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公开(公告)号：US4868853A
公开(公告)日：1989-09-19
申请号：US181528
申请日：1988-04-14
申请人： Morishi Izumita , Seiichi Mita , Nobukazu Doi , Masuo Umemoto , Hiroto Yamauchi , Shigeaki Fujino , Nobuo Murata
发明人： Morishi Izumita , Seiichi Mita , Nobukazu Doi , Masuo Umemoto , Hiroto Yamauchi , Shigeaki Fujino , Nobuo Murata
IPC分类号： H03M5/14
摘要： A demodulation circuit for demodulating a modulated digital including a unit for detecting a specific pattern contained in a series of data before modulation, a unit for judging the phase relation between the specific pattern and a clock pulse used for demodulation, a unit for performing a counting operation on the basis of the result of said judgment, and a unit for controlling the phase of said clock pulse for demodulation on the basis of the count.
摘要翻译： 一种用于解调调制数字的解调电路，包括用于检测包含在调制之前的一系列数据中的特定模式的单元，用于判断特定模式与用于解调的时钟脉冲之间的相位关系的单元，用于执行计数的单元 基于所述判断结果的操作，以及用于基于计数控制用于解调的所述时钟脉冲的相位的单元。
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公开(公告)号：US4733313A
公开(公告)日：1988-03-22
申请号：US854512
申请日：1986-04-22
CPC分类号： H04N5/32 , H04N1/2175
摘要： In medical image treating systems, especially when an X-ray image intensifier and TV camera are used, video signals composed of available video signals containing specified image information and unavailable video signals containing no such image information are output from the TV camera. Only the digital video signals of the converted digital video signals corresponding to the available video signals are treated and the digital video signals after treatment are recorded and reproduced with a recording device.
摘要翻译： 在医疗图像处理系统中，特别是使用X射线图像增强器和TV摄像机时，从TV摄像机输出包含指定图像信息的可用视频信号和不包含该图像信息的不可用视频信号的视频信号。 仅处理与可用视频信号相对应的经转换的数字视频信号的数字视频信号，并且用记录装置记录和再现处理后的数字视频信号。
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公开(公告)号：US4827489A
公开(公告)日：1989-05-02
申请号：US44489
申请日：1987-05-01
申请人： Nobukazu Doi , Hideki Imai , Morishi Izumita , Seiichi Mita , Akira Saito , Hiroto Yamauchi , Mamoru Kaneko , Tetsuya Amano
发明人： Nobukazu Doi , Hideki Imai , Morishi Izumita , Seiichi Mita , Akira Saito , Hiroto Yamauchi , Mamoru Kaneko , Tetsuya Amano
摘要： A device for decoding coded digital signals for every symbol consisting of a plurality of binary signals comprises first circuit for generating a first reliability for every binary signal; hard decided from the received or reproduced signal, in the symbol and second circuit for generating a second reliability for every symbol consisting of n binary signals on the basis of the first reliability, whereby decoding processing e.g. soft decision decoding is effected for every signal, depending on the second reliability.
摘要翻译： 用于对由多个二进制信号组成的每个符号对编码数字信号进行解码的装置包括用于为每个二进制信号产生第一可靠性的第一电路; 在符号和第二电路中根据所接收的或再现的信号硬判决，用于基于第一可靠性为由n个二进制信号组成的每个符号产生第二可靠性，从而解码处理例如。 根据第二可靠性，对每个信号进行软判决解码。
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公开(公告)号：US5151924A
公开(公告)日：1992-09-29
申请号：US454406
申请日：1989-12-21
申请人： Seiichi Mita , Morishi Izumita , Hiroshi Ide , Nobukazu Doi , Yoshinori Okada , Yasuo Inagaki
发明人： Seiichi Mita , Morishi Izumita , Hiroshi Ide , Nobukazu Doi , Yoshinori Okada , Yasuo Inagaki
CPC分类号： H04L25/03038 , G11B20/10009 , H04N5/926 , H04N5/93
摘要： An automatic equalization apparatus useful for supplying an output signal of a transversal filter simultaneously to two juxtaposed comparators, one of the two comparators performing signal identification, the other of the two comparators detecting an equalization error with the reference level changed, and extracting data from resultant two kinds of data trains by taking at least (N-1)/2+1 bits as the unit, N being the number of taps of the transversal filter, performing correlation computation, and setting tap coefficients of the transversal filter on the basis of the resultant accumulated value.
摘要翻译： 一种自动均衡装置，用于同时向两个并置的比较器提供横向滤波器的输出信号，两个比较器之一执行信号识别，两个比较器中的另一个比较器检测参考电平改变的均衡误差，并从结果中提取数据 通过以至少（N-1）/ 2 + 1位为单位，N为横向滤波器的抽头数，执行相关计算，以及基于横向滤波器的抽头系数设置两种数据串 产生累计值。
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公开(公告)号：US5036524A
公开(公告)日：1991-07-30
申请号：US473251
申请日：1990-01-29
IPC分类号： H03M5/14 , H03M5/06 , H04L25/03 , H04L25/49 , H04L25/497
CPC分类号： H04L25/497 , H04L25/03019
摘要： In a system for transmitting a binary source signal from a data transmitter to a data receiver through a noisy dispersive channel, the data transmitter includes a sliding block encoder which converts the binary source signal at a given symbol rate 1/T into an encoded binary data signal at a symbol rate P/(NT), where P and N are positive integers such that N/P.ltoreq..sup.2 log(3)/2= 0.79248. Since the channel introduces intersymbol interference and noise into the encoded data signal, the data receiver is formed from the cascade of an equalizer, a sampler and a reconstruction circuit which serves to reconstruct the binary source signal at the symbol rate 1/T. The reconstruction circuit includes a detector in a cascade with a decoder having memory the equalizer, sampler and detector are arranged for the detection of a ternary data signal at the symbol rate P/(2NT).
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