公开(公告)号：US07169313B2

公开(公告)日：2007-01-30

申请号：US11128272

申请日：2005-05-13

申请人： Norman A. Card ,  Robert D. Edwards ,  John J. Konrad ,  Roy H. Magnuson ,  Timothy L. Wells ,  Michael Wozniak

发明人： Norman A. Card ,  Robert D. Edwards ,  John J. Konrad ,  Roy H. Magnuson ,  Timothy L. Wells ,  Michael Wozniak

IPC分类号： H01B13/00 ,  H01K3/10

CPC分类号： H05K3/427 ,  H05K3/108 ,  H05K3/382 ,  H05K3/429 ,  H05K2203/0353 ,  H05K2203/1476 ,  Y10T29/49156 ,  Y10T29/49165

摘要： A method of plating a circuit pattern on a substrate to produce a circuitized substrate (e.g., a printed circuit board) in which a dual step metallurgy application process is used in combination with a dual step photo-resist removal process. Thru-holes are also possible, albeit not required.

摘要翻译： 将电路图案电镀在基板上以制造其中双步骤冶金施加工艺与双步骤光刻胶去除工艺结合使用的电路化基板（例如印刷电路板）的方法。 通孔也是可以的，尽管不是必需的。

公开(公告)号：US07910156B2

公开(公告)日：2011-03-22

申请号：US11730212

申请日：2007-03-30

申请人： Norman A. Card ,  Robert J. Harendza ,  John J. Konrad ,  Tonya L. Mosher ,  Susan Pitely ,  Jose A. Rios

发明人： Norman A. Card ,  Robert J. Harendza ,  John J. Konrad ,  Tonya L. Mosher ,  Susan Pitely ,  Jose A. Rios

IPC分类号： B05D5/12

CPC分类号： H01C17/065 ,  H01C1/144 ,  H01C7/006 ,  H05K3/243 ,  H05K3/28 ,  H05K3/3468 ,  H05K2201/0391 ,  H05K2203/044 ,  H05K2203/0574 ,  H05K2203/0577

摘要： A method of making a circuitized substrate in which conductors are formed in such a manner that selected ones of the conductors include solder while others do not and are thus adapted for receiving a different form of connection (e.g., wire-bond) than the solder covered conductors. In one embodiment, the solder may be applied in molten form by immersing the substrate within a bath of the solder while in another the solder may be deposited using a screening procedure.

摘要翻译： 一种制造电路化衬底的方法，其中导体以这样的方式形成，使得所选择的导体包括焊料，而另一些导体不适于接收不同于覆盖的焊料的不同形式的连接（例如，引线接合） 导体 在一个实施例中，焊料可以通过将衬底浸入焊料槽中而以熔融形式施加，而在另一种焊料中可以使用筛选程序进行沉积。

公开(公告)号：US08288266B2

公开(公告)日：2012-10-16

申请号：US11500328

申请日：2006-08-08

申请人： Norman A. Card ,  Richard A. Day ,  John J. Konrad

发明人： Norman A. Card ,  Richard A. Day ,  John J. Konrad

IPC分类号： H01L21/44

CPC分类号： H05K3/28 ,  H05K3/0023 ,  H05K2203/0557 ,  H05K2203/0577

摘要： A method of making a circuitized substrate in which the substrate includes circuit elements having exposed surfaces defined by two thin layers of permanent photoimaged solder mask material which are applied through fine mesh screens. The use of two thin layers assures effective coverage of the material to precisely expose the desired surfaces in high-density circuit patterns. A circuitized substrate assembly and an information handling system adapted for having one or more such assemblies therein are also provided.

摘要翻译： 一种制造电路化基板的方法，其中所述基板包括具有由通过细网格屏幕施加的两层永久性光刻焊接掩模材料限定的暴露表面的电路元件。 使用两个薄层确保材料的有效覆盖，以高密度电路图案精确地暴露所需的表面。 还提供了一种电路化基板组件和适于在其中具有一个或多个这样的组件的信息处理系统。

公开(公告)号：US20080241359A1

公开(公告)日：2008-10-02

申请号：US11730212

申请日：2007-03-30

申请人： Norman A. Card ,  Robert J. Harendza ,  John J. Konrad ,  Tonya Mosher ,  Susan Pitely ,  Jose A. Rios

发明人： Norman A. Card ,  Robert J. Harendza ,  John J. Konrad ,  Tonya Mosher ,  Susan Pitely ,  Jose A. Rios

IPC分类号： H01C17/06

CPC分类号： H01C17/065 ,  H01C1/144 ,  H01C7/006 ,  H05K3/243 ,  H05K3/28 ,  H05K3/3468 ,  H05K2201/0391 ,  H05K2203/044 ,  H05K2203/0574 ,  H05K2203/0577

摘要： A method of making a circuitized substrate in which conductors are formed in such a manner that selected ones of the conductors include solder while others do not and are thus adapted for receiving a different form of connection (e.g., wire-bond) than the solder covered conductors. In one embodiment, the solder may be applied in molten form by immersing the substrate within a bath of the solder while in another the solder may be deposited using a screening procedure.

摘要翻译： 一种制造电路化衬底的方法，其中导体以这样的方式形成，使得所选择的导体包括焊料，而另一些导体不适于接收不同于覆盖的焊料的不同形式的连接（例如，引线接合） 导体 在一个实施例中，焊料可以通过将衬底浸入焊料槽中而以熔融形式施加，而在另一种焊料中可以使用筛选程序进行沉积。

公开(公告)号：US20120243155A1

公开(公告)日：2012-09-27

申请号：US13009922

申请日：2011-01-20

申请人： Luis J. Matienzo ,  Norman A. Card ,  Daniel C. VanHart ,  John J. Konrad ,  Frank D. Egitto ,  Rabindra N. Das

发明人： Luis J. Matienzo ,  Norman A. Card ,  Daniel C. VanHart ,  John J. Konrad ,  Frank D. Egitto ,  Rabindra N. Das

IPC分类号： H05K7/14 ,  H01L21/50

CPC分类号： H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a circuitized substrate utilizing a conductive nub structure for enhanced interconnection integrity by using a joining core layer with copper outer layer on it, and forming thru-holes in the joining layer. Placing conductive adhesive in the thru-hole prior to removing the copper outer layers from the joining core layer creates an adhesive bump on joining core layer that engages a conductive secondary metal nub placed on the circuitized substrate-to-joining layer contact points, thus creating an enhanced connection between the layers.

摘要翻译： 通过使用其上具有铜外层的接合芯层和在接合层中形成通孔来形成利用导电嵌入结构的电路化衬底以增强互连完整性的方法。 在从接合芯层去除铜外层之前，将导电粘合剂放置在通孔中，在接合芯层上形成粘合凸块，该粘合凸块与放置在电路化的基底 - 接合层接触点上的导电二次金属复合体接合，从而产生 层之间的增强连接。

公开(公告)号：US20080038670A1

公开(公告)日：2008-02-14

申请号：US11500328

申请日：2006-08-08

申请人： Norman A. Card ,  Richard A. Day ,  John J. Konrad

发明人： Norman A. Card ,  Richard A. Day ,  John J. Konrad

IPC分类号： G03C5/00

CPC分类号： H05K3/28 ,  H05K3/0023 ,  H05K2203/0557 ,  H05K2203/0577

摘要： A method of making a circuitized substrate in which the substrate includes circuit elements having exposed surfaces defined by two thin layers of permanent photoimaged solder mask material which are applied through fine mesh screens. The use of two thin layers assures effective coverage of the material to precisely expose the desired surfaces in high-density circuit patterns. A circuitized substrate assembly and an information handling system adapted for having one or more such assemblies therein are also provided.

摘要翻译： 一种制造电路化基板的方法，其中所述基板包括具有由通过细网格屏幕施加的两层永久性光刻焊接掩模材料限定的暴露表面的电路元件。 使用两个薄层确保材料的有效覆盖，以高密度电路图案精确地暴露所需的表面。 还提供了一种电路化基板组件和适于在其中具有一个或多个这样的组件的信息处理系统。

公开(公告)号：US20120256722A1

公开(公告)日：2012-10-11

申请号：US13082444

申请日：2011-04-08

申请人： Ashwinkumar C. Bhatt ,  Norman A. Card ,  Charles Buchter

发明人： Ashwinkumar C. Bhatt ,  Norman A. Card ,  Charles Buchter

IPC分类号： H01C1/02 ,  H01C17/00

CPC分类号： H01C7/003 ,  H01C1/028 ,  H01C17/02 ,  H01C17/06 ,  H05K1/167 ,  H05K2201/0187 ,  Y10T29/49082

摘要： A method of forming a buried resistor within a cavity for use in electronic packages using two glass impregnated dielectric layers, one with a clearance hole, the second with a resistor core, the clearance hole being placed over the resistor core and the assembly fusion bonded. The space remaining around the resistor core is filled with a soldermask material and the assembly is coated with metal. Thru-holes are drilled, cleaned, and plated and then the metal coating is etched and partially removed. The soldermask is then removed and a layer of gold plating is applied to the exposed metal surfaces. The use of glass impregnated dielectric layers and fusion bonding eliminates the fluorinated ethylene propylene resin (FEP) bleed problem associated with previous buried resistor cavity assemblies.

摘要翻译： 在使用两个玻璃浸渍介电层的电子封装的空腔内形成埋入电阻器的方法，一个具有间隙孔，第二个具有电阻芯，该间隙放置在电阻器芯上并且组件熔接。 电阻芯周围剩余的空间填充有焊膏材料，组件用金属涂覆。 钻孔，清洁和电镀穿孔，然后蚀刻金属涂层并部分去除。 然后去除焊接掩模，并将一层镀金施加到暴露的金属表面。 使用玻璃浸渍的电介质层和熔融结合消除了与先前埋入的电阻器腔组件相关的氟化乙烯丙烯树脂（FEP）泄漏问题。

公开(公告)号：US07211470B2

公开(公告)日：2007-05-01

申请号：US11216133

申请日：2005-09-01

申请人： Norman A. Card ,  John M. Lauffer

发明人： Norman A. Card ,  John M. Lauffer

IPC分类号： H01L21/00

CPC分类号： H01L21/67126 ,  H01L21/486 ,  H05K3/4053 ,  H05K3/4069 ,  H05K2201/0116 ,  H05K2201/0959 ,  H05K2203/0139 ,  H05K2203/082 ,  H05K2203/1476

摘要： A method and apparatus for depositing conductive paste in openings of a circuitized substrate such as a multilayered printed circuit board to produce effective conductive thru-holes capable of being electrically coupled to selected conductive layers of the substrate. The invention comprises using vacuum to draw from the underside of the substrate while substantially simultaneously applying the paste onto the substrate's opposing surface. One example of means for accomplishing such paste application is a squeegee, and in one embodiment, two such squeegees may be used. A porous member is used to engage the substrate's undersurface during the vacuum draw, this member being positioned atop a base vacuum member through which the vacuum is drawn.

摘要翻译： 一种用于在诸如多层印刷电路板的电路化基板的开口中沉积导电浆料以产生能够电耦合到所述基板的选定导电层的有效导电通孔的方法和装置。 本发明包括使用真空从衬底的下侧抽出，同时基本上同时将糊料施加到衬底的相对表面上。 用于实现这种糊剂应用的手段的一个实例是刮刀，并且在一个实施例中，可以使用两个这样的刮板。 在真空拉伸期间，使用多孔构件与基板的下表面接合，该构件位于真空抽出的底部真空构件的顶部。

公开(公告)号：US08493173B2

公开(公告)日：2013-07-23

申请号：US13082444

申请日：2011-04-08

申请人： Ashwinkumar C. Bhatt ,  Norman A. Card ,  Charles Buchter

发明人： Ashwinkumar C. Bhatt ,  Norman A. Card ,  Charles Buchter

IPC分类号： H01C1/02

CPC分类号： H01C7/003 ,  H01C1/028 ,  H01C17/02 ,  H01C17/06 ,  H05K1/167 ,  H05K2201/0187 ,  Y10T29/49082

摘要： A method of forming a buried resistor within a cavity for use in electronic packages using two glass impregnated dielectric layers, one with a clearance hole, the second with a resistor core, the clearance hole being placed over the resistor core and the assembly fusion bonded. The space remaining around the resistor core is filled with a soldermask material and the assembly is coated with metal. Thru-holes are drilled, cleaned, and plated and then the metal coating is etched and partially removed. The soldermask is then removed and a layer of gold plating is applied to the exposed metal surfaces. The use of glass impregnated dielectric layers and fusion bonding eliminates the fluorinated ethylene propylene resin (FEP) bleed problem associated with previous buried resistor cavity assemblies.

摘要翻译： 在使用两个玻璃浸渍介电层的电子封装的空腔内形成埋入电阻器的方法，一个具有间隙孔，第二个具有电阻芯，该间隙放置在电阻器芯上并且组件熔接。 电阻芯周围剩余的空间填充有焊膏材料，组件用金属涂覆。 钻孔，清洁和电镀穿孔，然后蚀刻金属涂层并部分去除。 然后去除焊接掩模，并将一层镀金施加到暴露的金属表面。 使用玻璃浸渍的电介质层和熔融结合消除了与先前埋入的电阻器腔组件相关的氟化乙烯丙烯树脂（FEP）泄漏问题。

公开(公告)号：US20080110016A1

公开(公告)日：2008-05-15

申请号：US11598647

申请日：2006-11-14

申请人： Norman A. Card ,  Thomas R. Miller ,  William J. Rudik

发明人： Norman A. Card ,  Thomas R. Miller ,  William J. Rudik

IPC分类号： H05K3/36 ,  H05K1/11

CPC分类号： H05K3/4614 ,  H01L2224/05001 ,  H01L2224/05023 ,  H01L2224/0508 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/16225 ,  H05K3/3484 ,  H05K2203/061 ,  H05K2203/063 ,  H05K2203/1572 ,  Y10T29/49126 ,  Y10T29/49147 ,  Y10T29/49158 ,  H01L2924/00014 ,  H01L2924/013

摘要： A method of making a circuitized substrate assembly in which two or more subassemblies are aligned and bonded together. The bonding, preferably using lamination, results in effective electrical connections being formed between respective pairs of conductors of the subassemblies in such a manner that the metallurgies of the conductors, and those of an interim metallic solder paste, are effectively mixed and the flowable interim dielectric used between the mating subassemblies is forced to flow to engage and surround the conductor coupling, without adversely affecting the electrical connection formed.

摘要翻译： 一种制造电路化基板组件的方法，其中两个或更多个子组件对准并结合在一起。 优选使用层压的结合导致在子组件的各对导体之间形成有效的电连接，使得导体和中间金属焊膏的导体的冶金被有效地混合，并且可流动的中间电介质 在配合子组件之间使用的流体被迫流动以接合和围绕导体耦合，而不会不利地影响形成的电连接。