Strained layers within semiconductor buffer structures
    1.
    发明申请
    Strained layers within semiconductor buffer structures 有权
    半导体缓冲结构内的应变层

    公开(公告)号:US20080017952A1

    公开(公告)日:2008-01-24

    申请号:US11491616

    申请日:2006-07-24

    IPC分类号: H01L29/12 H01L21/20

    摘要: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The at least one strained transitional layer reduces an amount of workpiece bow due to differential coefficient of thermal expansion (CTE) contraction of the relaxed buffer layer relative to CTE contraction of the substrate

    摘要翻译: 包括衬底的半导体工件,包括形成在衬底上的渐变部分的松弛缓冲层以及缓和缓冲层的渐变部分内的至少一个应变过渡层及其制造方法。 至少一个应变过渡层由于松弛缓冲层相对于衬底的CTE收缩的差热膨胀系数(CTE)收缩而减少了工件弓的数量

    STRAINED LAYERS WITHIN SEMICONDUCTOR BUFFER STRUCTURES
    2.
    发明申请
    STRAINED LAYERS WITHIN SEMICONDUCTOR BUFFER STRUCTURES 有权
    半导体缓冲器结构中的应变层

    公开(公告)号:US20100006893A1

    公开(公告)日:2010-01-14

    申请号:US12562029

    申请日:2009-09-17

    IPC分类号: H01L29/12

    摘要: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The at least one strained transitional layer reduces an amount of workpiece bow due to differential coefficient of thermal expansion (CTE) contraction of the relaxed buffer layer relative to CTE contraction of the substrate

    摘要翻译: 包括衬底的半导体工件,包括形成在衬底上的渐变部分的松弛缓冲层以及缓和缓冲层的渐变部分内的至少一个应变过渡层及其制造方法。 至少一个应变过渡层由于松弛缓冲层相对于衬底的CTE收缩的差热膨胀系数(CTE)收缩而减少了工件弓的数量

    Strained layers within semiconductor buffer structures
    3.
    发明授权
    Strained layers within semiconductor buffer structures 有权
    半导体缓冲结构内的应变层

    公开(公告)号:US07608526B2

    公开(公告)日:2009-10-27

    申请号:US11491616

    申请日:2006-07-24

    IPC分类号: H01L21/20

    摘要: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The at least one strained transitional layer reduces an amount of workpiece bow due to differential coefficient of thermal expansion (CTE) contraction of the relaxed buffer layer relative to CTE contraction of the substrate

    摘要翻译: 包括衬底的半导体工件,包括形成在衬底上的渐变部分的松弛缓冲层以及缓和缓冲层的渐变部分内的至少一个应变过渡层及其制造方法。 至少一个应变过渡层由于松弛缓冲层相对于衬底的CTE收缩的差热膨胀系数(CTE)收缩而减少了工件弓的数量

    Strained layers within semiconductor buffer structures
    4.
    发明授权
    Strained layers within semiconductor buffer structures 有权
    半导体缓冲结构内的应变层

    公开(公告)号:US07825401B2

    公开(公告)日:2010-11-02

    申请号:US12562029

    申请日:2009-09-17

    IPC分类号: H01L29/06

    摘要: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The at least one strained transitional layer reduces an amount of workpiece bow due to differential coefficient of thermal expansion (CTE) contraction of the relaxed buffer layer relative to CTE contraction of the substrate.

    摘要翻译: 包括衬底的半导体工件,包括形成在衬底上的渐变部分的松弛缓冲层以及缓和缓冲层的渐变部分内的至少一个应变过渡层及其制造方法。 至少一个应变过渡层由于弛豫缓冲层相对于衬底的CTE收缩的差异热膨胀系数(CTE)收缩而减少了工件弓的数量。

    IN-SITU PRE-CLEAN PRIOR TO EPITAXY
    5.
    发明申请
    IN-SITU PRE-CLEAN PRIOR TO EPITAXY 有权
    在外国人的前期清洁

    公开(公告)号:US20130153961A1

    公开(公告)日:2013-06-20

    申请号:US13332211

    申请日:2011-12-20

    摘要: Methods for low temperature cleaning of a semiconductor surface prior to in-situ deposition have high throughput and consume very little of the thermal budget. GeH4 deposits Ge on the surface and converts any surface oxygen to GeOx. An etchant, such as Cl2 or HCl removes Ge and any GeOx and epitaxial deposition follows. A spike in Ge concentration can be left on the substrate from diffusion into the substrate. All three steps can be conducted sequentially in-situ at temperatures lower than conventional bake steps.

    摘要翻译: 在原位沉积之前对半导体表面进行低温清洁的方法具有高通量并且消耗很少的热量预算。 GeH4在表面上沉积Ge,并将任何表面氧转化为GeOx。 诸如Cl 2或HCl的蚀刻剂除去Ge并且随后进行任何GeO x和外延沉积。 Ge浓度的尖峰可以留在衬底上,从而扩散到衬底中。 所有这三个步骤可以在低于常规烘烤步骤的温度下依次原位进行。

    Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent
    6.
    发明授权
    Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent 有权
    使用甲硅烷基锗烷和稀释剂沉积锗/硅比大于1:1的外延硅锗层的方法

    公开(公告)号:US09127345B2

    公开(公告)日:2015-09-08

    申请号:US13413495

    申请日:2012-03-06

    摘要: The present application relates to methods for depositing a smooth, germanium rich epitaxial film by introducing silylgermane as a source gas into a reactor at low temperatures. The epitaxial film can be strained and serve as an active layer, or relaxed and serve as a buffer layer. In addition to the silylgermane gas, a diluent is provided to modulate the percentage of germanium in a deposited germanium-containing film by varying the ratio of the silylgermane gas and the diluent. The ratios can be controlled by way of dilution levels in silylgermane storage containers and/or separate flow, and are selected to result in germanium concentration greater than 55 atomic % in deposited epitaxial silicon germanium films. The diluent can include a reducing gas such as hydrogen gas or an inert gas such as nitrogen gas. Reaction chambers are configured to introduce silylgermane and the diluent to deposit the silicon germanium epitaxial films.

    摘要翻译: 本申请涉及通过在低温下将作为源气体的甲硅烷基锗烷引入反应器中来沉积光滑的富锗​​外延膜的方法。 外延膜可以被应变并用作活性层,或者松弛并用作缓冲层。 除了甲硅烷基锗烷气体之外,提供稀释剂以通过改变甲硅烷基锗烷气体和稀释剂的比例来调节沉积的含锗膜中的锗的百分比。 这些比例可以通过在甲硅烷基锗烷储存容器和/或单独流动中的稀释水平进行控制,并且被选择以在沉积的外延硅锗膜中导致大于55原子%的锗浓度。 稀释剂可以包括还原气体如氢气或惰性气体如氮气。 反应室被配置成引入甲硅烷基锗烷和稀释剂以沉积硅锗外延膜。

    METHODS AND APPARATUSES FOR EPITAXIAL FILMS WITH HIGH GERMANIUM CONTENT
    7.
    发明申请
    METHODS AND APPARATUSES FOR EPITAXIAL FILMS WITH HIGH GERMANIUM CONTENT 有权
    具有高锗含量的外源膜的方法和装置

    公开(公告)号:US20130233240A1

    公开(公告)日:2013-09-12

    申请号:US13413495

    申请日:2012-03-06

    摘要: The present application relates to methods for depositing a smooth, germanium rich epitaxial film by introducing silylgermane as a source gas into a reactor at low temperatures. The epitaxial film can be strained and serve as an active layer, or relaxed and serve as a buffer layer. In addition to the silylgermane gas, a diluent is provided to modulate the percentage of germanium in a deposited germanium-containing film by varying the ratio of the silylgermane gas and the diluent. The ratios can be controlled by way of dilution levels in silylgermane storage containers and/or separate flow, and are selected to result in germanium concentration greater than 55 atomic % in deposited epitaxial silicon germanium films. The diluent can include a reducing gas such as hydrogen gas or an inert gas such as nitrogen gas. Reaction chambers are configured to introduce silylgermane and the diluent to deposit the silicon germanium epitaxial films.

    摘要翻译: 本申请涉及通过在低温下将作为源气体的甲硅烷基锗烷引入反应器中来沉积光滑的富锗​​外延膜的方法。 外延膜可以被应变并用作活性层,或者松弛并用作缓冲层。 除了甲硅烷基锗烷气体之外,提供稀释剂以通过改变甲硅烷基锗烷气体和稀释剂的比例来调节沉积的含锗膜中的锗的百分比。 这些比例可以通过在甲硅烷基锗烷储存容器和/或单独流动中的稀释水平进行控制,并且被选择以在沉积的外延硅锗膜中导致大于55原子%的锗浓度。 稀释剂可以包括还原气体如氢气或惰性气体如氮气。 反应室被配置成引入甲硅烷基锗烷和稀释剂以沉积硅锗外延膜。

    Semiconductor buffer structures
    8.
    发明授权
    Semiconductor buffer structures 有权
    半导体缓冲结构

    公开(公告)号:US07785995B2

    公开(公告)日:2010-08-31

    申请号:US11431336

    申请日:2006-05-09

    IPC分类号: H01L21/28

    摘要: Pile ups of threading dislocations in thick graded buffer layer are reduced by enhancing dislocation gliding. During formation of a graded SiGe buffer layer, deposition of SiGe from a silicon precursor and a germanium precursor is interrupted one or more times with periods in which the flow of the silicon precursor to the substrate is stopped while the flow of the germanium precursor to the substrate is maintained.

    摘要翻译: 通过增强位错滑行,减少厚度梯度缓冲层穿透位错的堆积。 在形成渐变的SiGe缓冲层期间,SiGe从硅前体和锗前体的沉积被中断一次或多次,其中停止向硅衬底的硅前体的流动,同时锗前体流向 保持底物。

    Semiconductor device using a barrier layer between the gate electrode and substrate and method therefor
    9.
    发明授权
    Semiconductor device using a barrier layer between the gate electrode and substrate and method therefor 有权
    在栅电极和衬底之间使用阻挡层的半导体器件及其方法

    公开(公告)号:US06521961B1

    公开(公告)日:2003-02-18

    申请号:US09560737

    申请日:2000-04-28

    IPC分类号: H01L3106

    摘要: An enhancement mode semiconductor device has a barrier layer disposed between the gate electrode of the device and the semiconductor substrate underlying the gate electrode. The barrier layer increases the Schottky barrier height of the gate electrode-barrier layer-substrate interface so that the portion of the substrate underlying the gate electrode operates in an enhancement mode. The barrier layer is particularly useful ill compound semiconductor field effect transistors, and preferred materials for the barrier layer include aluminum gallium arsenide and indium gallium arsenide.

    摘要翻译: 增强型半导体器件具有设置在器件的栅极电极和栅极电极下方的半导体衬底之间的势垒层。 阻挡层增加了栅电极 - 阻挡层 - 衬底界面的肖特基势垒高度,使得栅电极下面的衬底的部分以增强模式工作。 阻挡层是特别有用的化合物半导体场效应晶体管,并且阻挡层的优选材料包括砷化铝镓和砷化铟镓。

    In-situ pre-clean prior to epitaxy
    10.
    发明授权
    In-situ pre-clean prior to epitaxy 有权
    外延前原位预清洁

    公开(公告)号:US09093269B2

    公开(公告)日:2015-07-28

    申请号:US13332211

    申请日:2011-12-20

    IPC分类号: H01L29/16 H01L21/02

    摘要: Methods for low temperature cleaning of a semiconductor surface prior to in-situ deposition have high throughput and consume very little of the thermal budget. GeH4 deposits Ge on the surface and converts any surface oxygen to GeOx. An etchant, such as Cl2 or HCl removes Ge and any GeOx and epitaxial deposition follows. A spike in Ge concentration can be left on the substrate from diffusion into the substrate. All three steps can be conducted sequentially in-situ at temperatures lower than conventional bake steps.

    摘要翻译: 在原位沉积之前对半导体表面进行低温清洁的方法具有高通量并且消耗很少的热量预算。 GeH4在表面上沉积Ge,并将任何表面氧转化为GeOx。 诸如Cl 2或HCl的蚀刻剂除去Ge并且随后进行任何GeO x和外延沉积。 Ge浓度的尖峰可以留在衬底上,从而扩散到衬底中。 所有这三个步骤可以在低于常规烘烤步骤的温度下依次原位进行。