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公开(公告)号:US20200242996A1
公开(公告)日:2020-07-30
申请号:US16714385
申请日:2019-12-13
发明人: Zhen WANG , Han ZHANG , Zhengkui WANG , Wei YAN , Yun QIAO , Wenwen QIN , Xiaozhou ZHAN , Jian SUN , Jian ZHANG , Deshuai WANG
IPC分类号: G09G3/20
摘要: A display panel, a display device and a display control method thereof are provided in the present disclosure. The display panel includes: a time division multiplexing multiplexer (MUX) signal input circuit, which is connected with each of the plurality of signal lines, and configured to input data signals of each frame of display image to the plurality of signal lines, and for each frame of display image, input trigger signals corresponding to sub-pixel units of different colors to the plurality of signal lines in a time-sharing manner; among the plurality of signal lines, electrical signals on a plurality of adjacent first signal lines are arranged in sequence according to an order of positive, positive, negative and negative; among the plurality of signal lines, a first signal line has a spacing distance from adjacent signal lines less than a preset value.
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公开(公告)号:US20200051654A1
公开(公告)日:2020-02-13
申请号:US15760294
申请日:2017-09-19
发明人: Zhen WANG , Jian SUN , Yun QIAO , Xiaozhou ZHAN , Fei HUANG , Han ZHANG , Wenwen QIN , Lele CONG , Zhengkui WANG
摘要: The embodiments of the present disclosure relate to a shift registers unit and a driving method thereof, and a gate driving device. The shift register unit includes a first and second input circuit, a pull-down control circuit, an output circuit, a pull-down circuit, and a control circuit. The first input circuit provides a first control signal to a pull-up node. The second input circuit provides a second control signal to the pull-up node. The pull-down control circuit provides the voltage of a first voltage terminal to a pull-down node, or controls the voltage of the pull-down node. The output circuit provides a second clock signal to a signal output terminal. The pull-down circuit provides the voltage of the first voltage terminal to the pull-up node and the signal output terminal. The control circuit provides the first input signal to the pull-up node.
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3.
公开(公告)号:US20190170918A1
公开(公告)日:2019-06-06
申请号:US16142326
申请日:2018-09-26
发明人: Yun QIAO , Zhengkui WANG , Lele CONG , Han ZHANG , Zhen WANG , Wenwen QIN , Jianjun ZHANG , Wei LI , Xuelu WANG , Yanqing CHEN , Jianyun XIE , Cheng LI , Jian SUN
摘要: An irregular shaped display panel, a method and a device for manufacturing the irregular shaped display panel, and a display device are provided. The irregular shaped display panel includes a display area and a non-display area surrounding the display area. The method for manufacturing an irregular shaped display panel includes: determining, based on an irregular shaped region on the display panel, boundary pixel units located on a boundary of the irregular shaped region; dividing each boundary pixel unit into at least two pixel division units such that each pixel division unit comprises parts of all sub-pixels of the boundary pixel unit; and determining whether a ratio of an area of each pixel division unit outside the display area to an area of the entire pixel division unit reaches a preset value; if yes, performing a shading process on the pixel division unit.
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公开(公告)号:US20200005881A1
公开(公告)日:2020-01-02
申请号:US16489185
申请日:2018-10-25
发明人: Peng LIU , Zhen WANG , Han ZHANG , Kai ZHANG , Yun QIAO , Jian SUN , Bailing LIU , Fei HUANG , Zhengkui WANG , Jianjun ZHANG
IPC分类号: G11C19/28 , G09G3/36 , G09G3/3266
摘要: A shift register includes a first input sub-circuit, a pull-up control sub-circuit, and a pull-down control sub-circuit. The first input sub-circuit is configured to transmit a voltage from the first signal terminal to the first node under control of the first voltage terminal. The pull-up control sub-circuit is configured to be in a turn-on or turn-off state under control of the first node. The pull-down control sub-circuit is configured to transmit a voltage from the third voltage terminal to the pull-down node under control of the first node, transmit the voltage from the third voltage terminal to the pull-down node under control of the signal output terminal, and transmit a voltage from the first clock signal terminal to the pull-down node under control of the first clock signal terminal.
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公开(公告)号:US20190288009A1
公开(公告)日:2019-09-19
申请号:US16352379
申请日:2019-03-13
发明人: Yun QIAO , Zhen WANG , Lele CONG , Zhengkui WANG , Jianjun ZHANG , Han ZHANG , Wenwen QIN , Fei HUANG , Xiaozhou ZHAN , Peng LIU , Jian SUN
IPC分类号: H01L27/12
摘要: A display panel and a display device are provided. The display panel includes a base substrate, the base substrate includes a display region and a non-display region, the display region includes a main display region and a peripheral display region, and the peripheral display region includes an irregular display region; the non-display region includes a first region and a second region, the first region is adjacent to the irregular display region, and the second region is adjacent to other regions of the peripheral display region than the irregular display region; the display region includes at least one signal line, the non-display region includes at least one functional circuit and at least one wire, and the at least one functional circuit is coupled to the at least one signal line via the at least one wire.
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公开(公告)号:US20190189645A1
公开(公告)日:2019-06-20
申请号:US16201771
申请日:2018-11-27
发明人: Lele CONG , Jian SUN , Zhengkui WANG , Wenwen QIN , Jianjun ZHANG
IPC分类号: H01L27/12
摘要: An array substrate includes: a base substrate; at least one first connection terminal, at least one second connection terminal, and at least one connection line, which are disposed on the base substrate and located in a non-display area of the array substrate, the at least one connection line being connected with the at least one first connection terminal and the at least one second connection terminal; at least one gate line disposed on the base substrate and located in a display area of the array substrate. The first connection terminal is for connecting with an IC, and the second connection terminal is for connecting with a flexible circuit board. A resistivity of at least a part of each of at least one of the at least one connection line is less than a resistivity of the at least one gate line.
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公开(公告)号:US20210357094A1
公开(公告)日:2021-11-18
申请号:US16476621
申请日:2019-01-10
发明人: Yun QIAO , Zhen WANG , Xiaozhou ZHAN , Han ZHANG , Wenwen QIN , Peng LIU , Zhengkui WANG
摘要: A wiring structure includes a plurality of first connection lines disposed in a first wiring layer and extending respectively from first ones of the plurality of first electrical contacts to first ones of the plurality of second electrical contacts, the first connection lines not intersecting each other; and a plurality of second connection lines disposed in a second wiring layer and extending respectively from second ones of the plurality of first electrical contacts to second ones of the plurality of second electrical contacts, the second connection lines not intersecting each other. An orthographic projection of any one of the first connection lines onto a plane parallel to the first and second wiring layers does not intersect an orthographic projection of any one of the second connection lines onto the plane.
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公开(公告)号:US20210149262A1
公开(公告)日:2021-05-20
申请号:US16642596
申请日:2019-01-04
发明人: Yun QIAO , Han ZHANG , Kai CHEN , Zhen WANG , Zhengkui WANG , Wenwen QIN , Wei YAN , Jian ZHANG , Xiaozhou ZHAN , Deshuai WANG , Jian SUN
IPC分类号: G02F1/1362 , G02F1/1339
摘要: A liquid crystal display panel and a display device. The liquid crystal display panel includes a display region and an opening region in the display region; the display region includes a plurality of sub-pixels, the display region includes a first edge and a second edge opposite to the first edge, the display region includes a first region between the opening region and the first edge and a second region between the opening region and the second edge, an orthographic projection of the opening region on the first edge respectively coincides with orthographic projections of the first region and the second region on the first edge, the plurality of sub-pixels comprise a main sub-pixel in the first region and a secondary sub-pixel in the second region, and an area of the main sub-pixel is smaller than an area of the secondary sub-pixel.
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公开(公告)号:US20200212071A1
公开(公告)日:2020-07-02
申请号:US16640940
申请日:2019-03-22
发明人: Zhixuan GUO , Fengguo WANG , Yezhou FANG , Feng LI , Xinguo WU , Hong LIU , Zifeng WANG , Lei LI , Feng LI , Kai LI , Liang TIAN , Jing ZHAO , Zhengkui WANG , Bo MA , Haiqin LIANG , Peng LIU
摘要: The present disclosure relates to the technical field of display. Disclosed are an array substrate and a preparation method therefor, and a display panel and a display device. The array substrate includes: a substrate; multiple gate lines, wherein the gate lines are located on the substrate, and extend along a first direction; multiple data lines, wherein the data lines are located on the substrate, and extend along a second direction, and the gate lines and the data lines intersect to define multiple pixel areas; and a touch-control electrode wiring wherein the touch-control electrode wiring has the same direction as that of the gate lines, and is arranged insulated from the gate lines on a different layer, and the orthographic projection of the touch-control electrode wiring on the substrate at least has an overlapping area with the orthographic projection of part of the gate lines on the substrate.
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10.
公开(公告)号:US20220137751A1
公开(公告)日:2022-05-05
申请号:US16955339
申请日:2019-07-26
发明人: Zhengkui WANG , Zhen WANG , Jian SUN , Jian ZHANG
IPC分类号: G06F3/044 , G06F3/041 , G02F1/1333
摘要: A display substrate, a display device, a manufacturing method of display substrate and a driving method of display substrate. The display substrate includes: a base substrate; a pixel array disposed on the base substrate; a plurality of gate lines extending in a first direction in the pixel array; a plurality of first touch electrodes disposed on the base substrate and extending in the first direction; a plurality of second touch electrodes disposed on the base substrate and located on a side of the plurality of first touch electrodes away from the base substrate, extending in a second direction crossing the first direction and intersecting the plurality of first touch electrodes; wherein the plurality of first touch electrodes and the plurality of gate lines are disposed in the same layer.
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