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42 条记录 (耗时 0.037 秒)

    Apparatus for accurate and efficient quality and reliability evaluation of micro electromechanical systems
    3.
    发明授权
    Apparatus for accurate and efficient quality and reliability evaluation of micro electromechanical systems 失效
    微机电系统的准确高效的质量和可靠性评估装置

    公开(公告)号：US07602265B2

    公开(公告)日：2009-10-13

    申请号：US11163485

    申请日：2005-10-20

    申请人： Hariklia Deligianni ,  Robert D. Edwards ,  Thomas J. Fleischman ,  Robert A. Groves ,  Charles J. Montrose ,  Richard P. Volant ,  Ping-Chuan Wang

    发明人： Hariklia Deligianni ,  Robert D. Edwards ,  Thomas J. Fleischman ,  Robert A. Groves ,  Charles J. Montrose ,  Richard P. Volant ,  Ping-Chuan Wang

    IPC分类号： H01H51/22

    CPC分类号： H01H59/0009

    摘要： The present invention provides multiple test structures for performing reliability and qualification tests on MEMS switch devices. A Test structure for contact and gap characteristic measurements is employed having a serpentine layout simulates rows of upper and lower actuation electrodes. A cascaded switch chain test is used to monitor process defects with large sample sizes. A ring oscillator is used to measure switch speed and switch lifetime. A resistor ladder test structure is configured having each resistor in series with a switch to be tested, and having each switch-resistor pair electrically connected in parallel. Serial/parallel test structures are proposed with MEMS switches working in tandem with switches of established technology. A shift register is used to monitor the open and close state of the MEMS switches. Pull-in voltage, drop-out voltage, activation leakage current, and switch lifetime measurements are performed using the shift register.

    摘要翻译： 本发明提供用于在MEMS开关装置上执行可靠性和鉴定测试的多个测试结构。 采用具有蛇形布局的接触和间隙特性测量的测试结构来模拟上下驱动电极的行。 级联交换链测试用于监控大样本量的过程缺陷。 环形振荡器用于测量开关速度和开关寿命。 电阻梯形测试结构被配置为具有与要测试的开关串联的每个电阻器，并且每个开关电阻器对并联电连接。 提出了串联/并联测试结构，其中MEMS开关与成熟技术的开关串联工作。 移位寄存器用于监测MEMS开关的开启和关闭状态。 使用移位寄存器执行拉入电压，掉电电压，启动漏电流和开关寿命测量。

    Method of fabricating integrated coil inductors for IC devices
    5.
    发明授权
    Method of fabricating integrated coil inductors for IC devices 有权
    IC器件集成线圈电感器的制造方法

    公开(公告)号：US06720230B2

    公开(公告)日：2004-04-13

    申请号：US10238746

    申请日：2002-09-10

    申请人： Raul E. Acosta ,  Melanie L. Carasso ,  Steven A. Cordes ,  Robert A. Groves ,  Jennifer L. Lund ,  Joanna Rosner

    发明人： Raul E. Acosta ,  Melanie L. Carasso ,  Steven A. Cordes ,  Robert A. Groves ,  Jennifer L. Lund ,  Joanna Rosner

    IPC分类号： H01L2120

    CPC分类号： H01L28/10 ,  H01F17/0006 ,  H01F17/0033 ,  H01F41/041 ,  H01L27/08

    摘要： A means for fabrication of solenoidal inductors integrated in a semiconductor chip is provided. The solenoidal coil is partially embedded in a deep well etched into the chip substrate. The non-embedded part of the coil is fabricated as part of the BEOL metallization layers. This allows for a large cross-sectional area of the solenoid turns, thus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The fabrication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric followed by fabrication of the part of the coil that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric and planarization of same by CMP. After planarization the fabrication of the remaining part of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil part of it may be built by electrodeposition through a mask on top of the BEOL layers.

    摘要翻译： 提供一种用于制造集成在半导体芯片中的螺线管电感器的装置。 螺线管线圈部分地嵌入到蚀刻到芯片衬底中的深阱中。 线圈的非嵌入部分被制造为BEOL金属化层的一部分。 这允许螺线管的大的横截面积的匝数，从而减少匝间电容耦合。 由于本发明的螺线管线圈具有大直径的横截面，所以线圈可以制造成具有大的电感值，并且占据芯片的小面积。 所述制造工艺包括在所有FEOL步骤完成之后蚀刻衬底中的深空腔; 用电介质衬里所述空腔，然后制造将通过掩模沉积导电材料金属而嵌入的线圈部分; 通过CMP沉积其相同的电介质和平面化。 在平坦化之后，螺线管线圈的剩余部分的制造被制造为BEOL中的金属化的一部分（即，作为BEOL的线/通路）。 为了进一步增加螺线管线圈的横截面，可以通过电沉积通过BEOL层顶部的掩模来构建。

    Apparatus and method for forming a battery in an integrated circuit
    7.
    发明授权
    Apparatus and method for forming a battery in an integrated circuit 失效
    用于在集成电路中形成电池的装置和方法

    公开(公告)号：US06650000B2

    公开(公告)日：2003-11-18

    申请号：US09761123

    申请日：2001-01-16

    申请人： Arne W. Ballantine ,  Robert A. Groves ,  Jennifer L. Lund ,  James S. Nakos ,  Michael B. Rice ,  Anthony K. Stamper

    发明人： Arne W. Ballantine ,  Robert A. Groves ,  Jennifer L. Lund ,  James S. Nakos ,  Michael B. Rice ,  Anthony K. Stamper

    IPC分类号： H01L2900

    CPC分类号： H01M10/052 ,  H01L23/522 ,  H01L23/58 ,  H01L2924/0002 ,  H01M4/5825 ,  H01M6/42 ,  H01M10/0562 ,  H01M10/058 ,  H01M10/425 ,  H01L2924/00

    摘要： A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires connecting the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices. The battery may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.

    摘要翻译： 在集成电路内提供电池的方法和结构，用于向存在于集成电路内的低电流电子器件提供电压。 该方法包括用于在半导体晶片上产生电子器件层的前端在线（FEOL）处理，随后是用于将电子器件连接在一起的线的后端（BEOL）集成，以形成完整的电 集成电路的电路。 BEOL集成包括在电子设备层上形成布线层的多层结构。 每个布线层包括嵌入在绝缘材料中的导电金属化（例如，金属镀通孔，导电布线等）。 电池在BEOL集成期间在一个或多个布线层次内形成，并且导电金属化将电池的正端子和负极端子电连接到电子设备。 相对于电池电极和电解质之间的结构和几何关系，电池可能具有几种不同的拓扑结构。 多个电池可以形成在一个或多个布线层中，并且可以导电地耦合到电子设备。 多个电池可以串联或并联连接。

    Integrated coil inductors for IC devices
    10.
    发明授权
    Integrated coil inductors for IC devices 有权
    用于IC器件的集成线圈电感器

    公开(公告)号：US06492708B2

    公开(公告)日：2002-12-10

    申请号：US09808381

    申请日：2001-03-14

    申请人： Raul E. Acosta ,  Melanie L. Carasso ,  Steven A. Cordes ,  Robert A. Groves ,  Jennifer L. Lund ,  Joanna Rosner

    发明人： Raul E. Acosta ,  Melanie L. Carasso ,  Steven A. Cordes ,  Robert A. Groves ,  Jennifer L. Lund ,  Joanna Rosner

    IPC分类号： H01L2900

    CPC分类号： H01L28/10 ,  H01F17/0006 ,  H01F17/0033 ,  H01F41/041 ,  H01L27/08

    摘要： A means for fabrication of solenoidal inductors integrated in a semiconductor chip is provided. The solenoidal coil is partially embedded in a deep well etched into the chip substrate. The non-embedded part of the coil is fabricated as part of the BEOL metallization layers. This allows for a large cross-sectional area of the solenoid turns, thus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The fabrication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric followed by fabrication of the part of the coil that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric and planarization of same by CMP. After planarization the fabrication of the remaining part of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil part of it may be built by electrodeposition through a mask on top of the BEOL layers.

    摘要翻译： 提供一种用于制造集成在半导体芯片中的螺线管电感器的装置。 螺线管线圈部分地嵌入到蚀刻到芯片衬底中的深阱中。 线圈的非嵌入部分被制造为BEOL金属化层的一部分。 这允许螺线管的大的横截面积的匝数，从而减少匝间电容耦合。 由于本发明的螺线管线圈具有大直径的横截面，所以线圈可以制造成具有大的电感值，并且占据芯片的小面积。 所述制造工艺包括在所有FEOL步骤完成之后蚀刻衬底中的深空腔; 用电介质衬里所述空腔，然后制造将通过掩模沉积导电材料金属而嵌入的线圈部分; 通过CMP沉积其相同的电介质和平面化。 在平坦化之后，螺线管线圈的剩余部分的制造被制造为BEOL中的金属化的一部分（即，作为BEOL的线/通路）。 为了进一步增加螺线管线圈的横截面，可以通过电沉积通过BEOL层顶部的掩模来构建。