利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

62 条记录 (耗时 0.025 秒)

    Thermal interposer for thermal management of semiconductor devices
    5.
    发明授权
    Thermal interposer for thermal management of semiconductor devices 失效
    用于半导体器件热管理的热插入器

    公开(公告)号：US07180179B2

    公开(公告)日：2007-02-20

    申请号：US10872575

    申请日：2004-06-18

    申请人： Lawrence S. Mok ,  Evan G. Colgan ,  Minhua Lu ,  Da-Yuan Shih

    发明人： Lawrence S. Mok ,  Evan G. Colgan ,  Minhua Lu ,  Da-Yuan Shih

    IPC分类号： H01L23/34 ,  H01L23/495

    CPC分类号： H01L23/427 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10158 ,  H01L2924/15311

    摘要： A thermal interposer is provided for attachment to a surface of a semiconductor device. In one embodiment, the thermal interposer includes an upper plate having a bottom surface with a plurality of grooves and made of a material having high thermal conductivity, and a lower plate having a top surface with a plurality of grooves and made of a material having a coefficient of thermal expansion that is substantially the same as the coefficient of thermal expansion of the material of a semiconductor device that is bonded to the bottom surface of the lower plate. The bottom surface of the upper plate is hermetically bonded to the top surface of the lower plate so that a vapor chamber is formed by the upper and lower plates, and walls of the grooves on the top surface of the lower plate extend to within less than 250 microns from walls of the grooves on the bottom surface of the upper plate comprise a plurality of second walls the first walls.

    摘要翻译： 提供了用于附接到半导体器件的表面的热插入件。 在一个实施例中，热插入件包括具有多个凹槽并由具有高导热性的材料制成的底表面的上板，以及具有多个凹槽的顶表面的下板，并由具有 热膨胀系数与结合到下板的底面的半导体器件的材料的热膨胀系数基本相同。 上板的底面与下板的顶面密封，从而通过上板和下板形成蒸气室，下板顶表面上的槽的壁延伸到小于 在上板的底表面上的槽的壁250微米包括多个第二壁和第一壁。

    Cooling of substrate using interposer channels
    7.
    发明授权
    Cooling of substrate using interposer channels 有权
    使用插入器通道冷却衬底

    公开(公告)号：US08059400B2

    公开(公告)日：2011-11-15

    申请号：US12233104

    申请日：2008-09-18

    申请人： Minhua Lu ,  Lawrence S. Mok

    发明人： Minhua Lu ,  Lawrence S. Mok

    IPC分类号： H05K7/20

    CPC分类号： H01L23/427 ,  F28D15/0266 ,  H01L23/433 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10253 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2924/00 ,  H01L2224/0401

    摘要： A method of forming a structure. An interposer is provided. The interposer is adapted to be interposed between a heat source and a heat sink and to transfer heat from the heat source to the heat sink. The interposer includes an enclosure that encloses a cavity. The enclosure is made of a thermally conductive material. The cavity includes a thermally conductive foam material. The foam material includes pores and includes at least one serpentine channel. Each serpentine channel has at least two contiguously connected channel segments. Each serpentine channel independently forms a closed loop or an open ended loop. The foam material is adapted to be soaked by a liquid filling the pores. Each serpentine channel is adapted to be partially filled with a fluid that serves to transfer heat from the heat source to the heat sink.

    摘要翻译： 一种形成结构的方法。 提供了插入器。 插入件适于插入在热源和散热器之间并将热量从热源传递到散热器。 插入器包括封闭空腔的外壳。 外壳由导热材料制成。 空腔包括导热泡沫材料。 泡沫材料包括孔，并且包括至少一个蛇形通道。 每个蛇形通道具有至少两个连续连接的通道段。 每个蛇形通道独立地形成闭环或开放端环。 泡沫材料适于被填充孔的液体浸泡。 每个蛇形通道适于部分地填充有用于将热量从热源传递到散热器的流体。

    Cooling of substrate using interposer channels
    8.
    发明授权
    Cooling of substrate using interposer channels 有权
    使用插入器通道冷却衬底

    公开(公告)号：US07888603B2

    公开(公告)日：2011-02-15

    申请号：US12212925

    申请日：2008-09-18

    申请人： Minhua Lu ,  Lawrence S. Mok

    发明人： Minhua Lu ,  Lawrence S. Mok

    IPC分类号： H05K1/00

    CPC分类号： H01L23/427 ,  F28D15/0266 ,  H01L23/433 ,  H01L2224/16 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/10253 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/4913 ,  Y10T29/49165 ,  Y10T29/49204 ,  H01L2924/00 ,  H01L2224/0401

    摘要： A structure. The structure includes a substrate and an interposer. The substrate includes a heat source and N continuous substrate channels on a first side of the substrate (N≧2). The interposer includes N continuous interposer channels coupled to the N substrate channels to form M continuous loops (1≦M≦N). Each loop independently consists of K substrate channels and K interposer channels in an alternating sequence. For each loop, K is at least 1 and is subject to an upper limit consistent with a constraint of the M loops collectively consisting of the N interposer channels and the N substrate channels. Each loop is independently open ended or closed. The first side of the substrate is connected to the interposer. The interposer is adapted to be thermally coupled to a heat sink such that the interposer is interposed between the substrate and the heat sink.

    摘要翻译： 一个结构。 该结构包括基板和插入件。 衬底在衬底的第一侧上包括热源和N个连续衬底通道（N≥2）。 插入器包括耦合到N个衬底通道的N个连续插入器通道，以形成M个连续环路（1＆amp; NlE; M＆amp; N; N）。 每个回路以交替顺序独立地由K个衬底通道和K个插入器通道组成。 对于每个循环，K至少为1，并且受到与由N个插入物通道和N个底物通道组成的M个回路的约束一致的上限。 每个循环是独立开放的或封闭的。 衬底的第一面连接到插入器。 插入器适于热耦合到散热器，使得插入器插入在基板和散热器之间。

    Computer system performance estimator and layout configurator
    9.
    发明授权
    Computer system performance estimator and layout configurator 失效
    计算机系统性能估计器和布局配置器

    公开(公告)号：US07836314B2

    公开(公告)日：2010-11-16

    申请号：US11506876

    申请日：2006-08-21

    申请人： Trieu C. Chieu ,  Hoi Y. Chan ,  Vinod Kamath ,  Lawrence S. Mok

    发明人： Trieu C. Chieu ,  Hoi Y. Chan ,  Vinod Kamath ,  Lawrence S. Mok

    IPC分类号： G06F1/00

    CPC分类号： G06F1/206 ,  H05K7/20836

    摘要： A method, system and computer readable medium for maximizing the performance of a computer system that includes at least one computing unit. Temperature and location data for each computing unit is received by a server unit and the location of each computing unit within a given environment is reevaluated and revised to maximize the overall performance of the computer system.

    摘要翻译： 一种用于使包括至少一个计算单元的计算机系统的性能最大化的方法，系统和计算机可读介质。 每个计算单元的温度和位置数据由服务器单元接收，并且重新评估和修改给定环境内的每个计算单元的位置以使计算机系统的整体性能最大化。

    LASER ANNEALING FOR 3-D CHIP INTEGRATION
    10.
    发明申请
    LASER ANNEALING FOR 3-D CHIP INTEGRATION 有权
    激光退火三维芯片整合

    公开(公告)号：US20090184264A1

    公开(公告)日：2009-07-23

    申请号：US12018756

    申请日：2008-01-23

    申请人： Howard H. Chen ,  Louis C. Hsu ,  Lawrence S. Mok ,  J. Campbell Scott

    发明人： Howard H. Chen ,  Louis C. Hsu ,  Lawrence S. Mok ,  J. Campbell Scott

    IPC分类号： H01L21/268

    CPC分类号： H01L21/324 ,  H01L21/268 ,  H01L24/01 ,  H01L25/0657 ,  H01L27/0688 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/14 ,  H01L2924/00

    摘要： A laser annealing method for annealing a stacked semiconductor structure having at least two stacked layers is disclosed. A laser beam is focused on a lower layer of the stacked layers. The laser beam is then scanned to anneal features in the lower layer. The laser beam is then focused on an upper layer of the stacked layers, and the laser beam is scanned to anneal features in the upper layer. The laser has a wavelength of less than one micrometer. The beam size, depth of focus, energy dosage, and scan speed of the laser beam are programmable. Features in the lower layer are offset from features in the upper layer such that these features do not overlap along a plane parallel to a path of the laser beam. Each of the stacked layers includes active devices, such as transistors. Also, the first and second layers may be annealed simultaneously.

    摘要翻译： 公开了一种用于退火具有至少两个堆叠层的层叠半导体结构的激光退火方法。 激光束聚焦在堆叠层的下层。 然后扫描激光束以退火下层中的特征。 然后将激光束聚焦在堆叠层的上层上，并且激光束被扫描以退火上层中的特征。 激光器的波长小于1微米。 激光束的光束尺寸，焦深，能量投射和扫描速度是可编程的。 较低层中的特征偏离上层中的特征，使得这些特征不沿着与激光束的路径平行的平面重叠。 堆叠层中的每一个包括诸如晶体管的有源器件。 此外，第一层和第二层可以同时退火。