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    System for transient voltage suppressors
    3.
    发明授权
    System for transient voltage suppressors 有权
    瞬态电压抑制器系统

    公开(公告)号：US08530902B2

    公开(公告)日：2013-09-10

    申请号：US13281638

    申请日：2011-10-26

    申请人： Avinash Srikrishnan Kashyap ,  David Mulford Shaddock ,  Emad Andarawis Andarawis ,  Peter Micah Sandvik ,  Stephen Daley Arthur ,  Vinayak Tilak

    发明人： Avinash Srikrishnan Kashyap ,  David Mulford Shaddock ,  Emad Andarawis Andarawis ,  Peter Micah Sandvik ,  Stephen Daley Arthur ,  Vinayak Tilak

    IPC分类号： H01L29/15

    CPC分类号： H01L21/56 ,  H01L23/3185 ,  H01L29/0657 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/861 ,  H01L29/8618 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The TVS assembly includes a semiconductor die in a mesa structure that includes a first layer of a first wide band gap semiconductor having a conductivity of a first polarity, a second layer of the first or a second wide band gap semiconductor having a conductivity of a second polarity coupled in electrical contact with the first layer wherein the second polarity is different than the first polarity. The TVS assembly also includes a third layer of the first, the second, or a third wide band gap semiconductor having a conductivity of the first polarity coupled in electrical contact with the second layer. The layer having a conductivity of the second polarity is lightly doped relative to the layers having a conductivity of the first polarity.

    摘要翻译： 提供了形成碳化硅瞬态电压抑制器（TVS）组件的方法和用于瞬态电压抑制器（TVS）组件的系统。 TVS组件包括台面结构中的半导体管芯，其包括具有第一极性的导电率的第一宽带隙半导体的第一层，具有第二极导电率的第一或第二宽带隙半导体的第二层 极性与第一层电接触，其中第二极性不同于第一极性。 TVS组件还包括具有与第二层电接触的第一极性的导电性的第一，第二或第三宽带隙半导体的第三层。 相对于具有第一极性的导电性的层，具有第二极性的导电性的层被轻掺杂。

    Clearance measurement system and method of operation
    9.
    发明授权
    Clearance measurement system and method of operation 有权
    间隙测量系统和操作方法

    公开(公告)号：US07333913B2

    公开(公告)日：2008-02-19

    申请号：US11167434

    申请日：2005-06-27

    申请人： Emad Andarawis Andarawis ,  Mahadevan Balasubramaniam ,  Todd Alan Anderson ,  Samhita Dasgupta ,  David Mulford Shaddock ,  Shobhana Mani ,  Jie Jiang

    发明人： Emad Andarawis Andarawis ,  Mahadevan Balasubramaniam ,  Todd Alan Anderson ,  Samhita Dasgupta ,  David Mulford Shaddock ,  Shobhana Mani ,  Jie Jiang

    IPC分类号： G01B5/14

    CPC分类号： G01B7/144

    摘要： A clearance measurement system is provided. The clearance measurement system includes a reference geometry disposed on a first object having an otherwise continuous surface geometry and a sensor disposed on a second object, wherein the sensor is configured to generate a first signal representative of a first sensed parameter from the first object and a second signal representative of a second sensed parameter from the reference geometry. The clearance measurement system also includes a processing unit configured to process the first and second signals to estimate a clearance between the first and second objects based upon a measurement difference between the first and second sensed parameters.

    摘要翻译： 提供了间隙测量系统。 间隙测量系统包括设置在具有另外连续的表面几何形状的第一物体上的参考几何形状和设置在第二物体上的传感器，其中传感器被配置为产生表示来自第一物体的第一感测参数的第一信号，以及 第二信号表示来自参考几何的第二感测参数。 间隙测量系统还包括处理单元，其被配置为基于第一和第二感测参数之间的测量差异来处理第一和第二信号以估计第一和第二对象之间的间隙。

    Electronic circuit board, assembly and a related method thereof
    10.
    发明授权
    Electronic circuit board, assembly and a related method thereof 有权
    电子电路板，组装及其相关方法

    公开(公告)号：US09113583B2

    公开(公告)日：2015-08-18

    申请号：US13563132

    申请日：2012-07-31

    申请人： David Mulford Shaddock ,  Emad Andarawis Andarawis

    发明人： David Mulford Shaddock ,  Emad Andarawis Andarawis

    IPC分类号： H05K1/00 ,  H05K3/28

    CPC分类号： H05K3/282 ,  H01L2224/16225 ,  H05K2203/1194

    摘要： An apparatus includes a substrate and a plurality of conductive traces formed on the substrate. The conductive traces are doped with a concentration of an aluminum material forming a protective layer as a portion of the plurality of conductive traces to inhibit oxidation. A set of first metal contact pads are formed in contact with the plurality of conductive traces. The substrate, the plurality of conductive traces and the set of first metal contact pads define an electronic circuit board configured to operate at a temperature greater than 200 degrees Celsius. A high operating temperature electronic device is configured in electrical communication with the conductive traces defining an assembly configured to operate at a temperature greater than 200 degrees Celsius.

    摘要翻译： 一种装置包括基板和形成在基板上的多个导电迹线。 导电迹线掺杂有形成保护层的铝材料的浓度作为多个导电迹线的一部分以抑制氧化。 形成与多个导电迹线接触的一组第一金属接触焊盘。 衬底，多个导电迹线和第一金属接触焊盘组限定了配置成在大于200摄氏度的温度下操作的电子电路板。 高工作温度电子器件被配置为与导电迹线电连通，导电迹线限定被配置为在大于200摄氏度的温度下操作的组件。