公开(公告)号：US4055802A

公开(公告)日：1977-10-25

申请号：US713910

申请日：1976-08-12

申请人： Peter Theodore Panousis ,  Robert Leonard Pritchett ,  Friedolf Michael Smits

发明人： Peter Theodore Panousis ,  Robert Leonard Pritchett ,  Friedolf Michael Smits

IPC分类号： G11C17/00 ,  G06F11/00 ,  G06F11/26 ,  G11C5/00 ,  G11C17/08 ,  H01L21/822 ,  H01L21/8229 ,  H01L27/02 ,  H01L27/04 ,  H01L27/102 ,  G01R15/12 ,  G01R31/30

CPC分类号： G06F11/006 ,  G06F11/26 ,  G11C17/08 ,  G11C5/00 ,  H01L27/02

摘要： For identification purposes, a network is added to a multiply configurable microminiature array. During fabrication of the array, the connection pattern of the network is established to be uniquely representative of the particular circuit then being formed in the array. In response to interrogation signals applied to the array, the network provides a unique pattern of voltages representative of the particular circuit. During actual operation of the array, the identification network is in effect automatically disconnected therefrom.

摘要翻译： 为了识别目的，将网络添加到多重可配置的微型阵列中。 在阵列的制造期间，建立网络的连接模式以唯一地代表然后形成在阵列中的特定电路。 响应于施加到阵列的询问信号，网络提供代表特定电路的独特的电压模式。 在阵列的实际操作期间，识别网络实际上与其自动断开连接。

公开(公告)号：US4099260A

公开(公告)日：1978-07-04

申请号：US724652

申请日：1976-09-20

申请人： Dennis Joseph Lynes ,  Peter Theodore Panousis ,  Robert Leonard Pritchett

发明人： Dennis Joseph Lynes ,  Peter Theodore Panousis ,  Robert Leonard Pritchett

IPC分类号： G11C17/06 ,  H01L21/8229 ,  H01L27/102

CPC分类号： H01L21/8229 ,  G11C17/06 ,  H01L27/1021 ,  Y10S257/926

摘要： A semiconductor read-only-memory (ROM) unit fabricated in large-scale-integrated form utilizing the formation of self-isolating bit-line surface regions of one conductivity type directly in a bulk region of the opposite conductivity type. Channel-stop regions of the same conductivity type as the bulk region are formed in the spaces between bit-line regions. Metallic word-lines overlying and orthogonal to the bit-line regions are formed, separated from the bit-line regions by an insulating layer. The memory cell comprises a single Schottky diode. Such a diode is made or not at each word-line/bit-line crossover location depending respectively on whether or not an aperture is formed in the insulating layer during fabrication to permit the word-line to contact a lightly doped portion of the bit-line. ROM units formed by this method are characterized by small area, high speed, low power dissipation and low cost.

摘要翻译： 半导体只读存储器（ROM）单元以大规模集成形式制造，利用直接在相反导电类型的本体区域中形成一种导电类型的自隔离位线表面区域。 在位线区域之间的空间中形成与体区相同的导电类型的通道停止区域。 通过绝缘层与位线区域形成叠加并垂直于位线区域的金属字线。 存储单元包括单个肖特基二极管。 分别取决于在制造期间是否在绝缘层中形成孔径以允许字线接触位线的轻掺杂部分的每个字线/位线交叉位置处的这种二极管， 线。 由该方法形成的ROM单元的特点是面积小，速度快，功耗低，成本低。