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公开(公告)号:US09887678B2
公开(公告)日:2018-02-06
申请号:US15174856
申请日:2016-06-06
Applicant: QUALCOMM Incorporated
Inventor: Amir Hossein Masnadi Shirazi Nejad , Mazhareddin Taghivand , Seyed Hossein Miri Lavasani , Mohammad Emadi
CPC classification number: H03G1/0035 , H03F1/3205 , H03F1/3223 , H03F3/193 , H03F3/195 , H03F2200/21 , H03F2200/294 , H03F2200/301 , H03F2200/381 , H03F2200/451 , H03F2200/489 , H03F2200/492 , H03F2200/75 , H04W84/12
Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.
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公开(公告)号:US20170179896A1
公开(公告)日:2017-06-22
申请号:US15174856
申请日:2016-06-06
Applicant: QUALCOMM Incorporated
Inventor: Amir Hossein Masnadi Shirazi Nejad , Mazhareddin Taghivand , Seyed Hossein Miri Lavasani , Mohammad Emadi
CPC classification number: H03G1/0035 , H03F1/3205 , H03F1/3223 , H03F3/193 , H03F3/195 , H03F2200/21 , H03F2200/294 , H03F2200/301 , H03F2200/381 , H03F2200/451 , H03F2200/489 , H03F2200/492 , H03F2200/75 , H04W84/12
Abstract: A linear low noise amplifier is disclosed. In at least one exemplary embodiment, the linear low noise amplifier may include a first metal oxide semiconductor field effect transistor (MOSFET) configured to operate in a triode mode coupled to a second MOSFET configured to operate in a saturation mode. Linearity of the low noise amplifier may be determined, at least in part, by a transconductance associated with the second MOSFET and a channel resistance associated the first MOSFET.
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公开(公告)号:US10608583B2
公开(公告)日:2020-03-31
申请号:US15638183
申请日:2017-06-29
Applicant: QUALCOMM Incorporated
Inventor: Mazhareddin Taghivand , Alireza Khalili , Mohammad Emadi , Yashar Rajavi
Abstract: Certain aspects of the present disclosure provide methods and apparatus for reducing phase noise in voltage-controlled oscillators (VCOs). One example VCO generally includes a first resonant circuit comprising an inductor and a first variable capacitive element coupled in parallel with the inductor; and a second variable capacitive element coupled to a center tap of the inductor and further coupled to a reference voltage, wherein the center tap of the inductor is further coupled to a voltage source.
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公开(公告)号:US09729179B1
公开(公告)日:2017-08-08
申请号:US15190444
申请日:2016-06-23
Applicant: QUALCOMM Incorporated
Inventor: Mohammad Emadi , Mazhareddin Taghivand , Yann Ly-Gagnon
CPC classification number: H04B1/123 , H04B1/1027 , H04B1/109
Abstract: Systems and methods for interference cancellation in a receiver of wireless signals include receiving a signal comprising an aggressor and a desired signal. The received signal is amplified in a low noise amplifier (LNA) to generate an amplified received signal. The aggressor is extracted from the received signal in a feed-forward path between an input of the LNA and an output of the LNA, to generate an extracted aggressor and the extracted aggressor is subtracted from the amplified received signal to provide the desired signal. An amplify and rotate block in the feed-forward path is used to align a phase of the aggressor to a phase of the amplified received signal in order to enable the subtraction.
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公开(公告)号:US20180131397A1
公开(公告)日:2018-05-10
申请号:US15343791
申请日:2016-11-04
Applicant: QUALCOMM Incorporated
Inventor: Mohammad Emadi , Mazhareddin Taghivand , Alireza Khalili
CPC classification number: H04B1/1081 , H04B1/1036 , H04B1/525 , H04L27/14
Abstract: A method of and system for processing a received signal is disclosed. The method includes generating a corrected radio frequency (RF) signal based on an RF feedback signal and an incoming RF signal, the incoming RF signal includes a wanted signal and an interfering signal. The method also includes down-converting the corrected RF signal to a corrected in-phase baseband signal and a corrected quadrature-phase baseband signal; extracting, based on a baseband signal of an aggressor signal, an in-phase baseband signal of the interfering signal from the corrected in-phase baseband signal; extracting, based on the baseband signal of the aggressor, a quadrature-phase baseband signal of the interfering signal from the corrected quadrature-phase baseband signal; up-converting the extracted interfering signals to produce the RF feedback signal; and generating a second corrected RF signal based on the second RF feedback signal and the incoming RF signal.
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公开(公告)号:US20180083661A1
公开(公告)日:2018-03-22
申请号:US15273461
申请日:2016-09-22
Applicant: QUALCOMM Incorporated
Inventor: Mohammad Emadi , Mazhareddin Taghivand , Alireza Khalili
IPC: H04B1/10
CPC classification number: H04B1/1036 , H04B1/16 , H04B17/0085 , H04B17/21 , H04B17/354
Abstract: Various aspects of this disclosure describe the calibration of residual sideband energy in a receiver, for example estimating gain mismatch and phase mismatch in in-phase (I) and quadrature-phase channels (Q) of a receiver. An input to the receiver is supplied with an input signal generated to comprise a bandwidth including a plurality of frequencies, such as a linear frequency modulation signal. An output signal of the receiver is filtered by a filter programmed to be matched to the input signal, and estimates of gain error and phase error in I and Q channels of the receiver are determined from the filtered outputs.
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公开(公告)号:US09806724B1
公开(公告)日:2017-10-31
申请号:US15273600
申请日:2016-09-22
Applicant: QUALCOMM Incorporated
Inventor: Mojtaba Sharifzadeh , Alireza Khalili , Mazhareddin Taghivand , Mohammad Emadi
CPC classification number: H03L7/0891 , H03L7/0893 , H03L7/0895 , H03L7/093 , H03L7/18
Abstract: Various aspects of this disclosure describe switched-capacitor circuits in a PLL. Examples include routing current from a first current source through a capacitor to ground during a first clock phase, routing current from a second current source through the capacitor to ground during a second clock phase, and transferring charge on the capacitor to a loop filter capacitor during a third clock phase. The first current source may generate current responsive to UP error samples from a phase/frequency detector (PFD), and the second current source generates current responsive to DN error samples from the PFD.
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公开(公告)号:US10884449B2
公开(公告)日:2021-01-05
申请号:US16404032
申请日:2019-05-06
Applicant: QUALCOMM Incorporated
Inventor: Alireza Khalili , Mohammad Emadi , Shahram Abdollahi-Alibeik , Ali Mostajeran
Abstract: An LO clock signal generator includes a fundamental mixer for mixing a source clock signal with a divided version of the source clock signal. The LO clock signal generator also includes a harmonic mixer for mixing the source clock signal with a third harmonic of a divided version of the source clock signal.
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