摘要:
In the process of braze attachment of electronic package members, such as attaching metallic coated connector pins to a multilayer ceramic substrate, contact areas of the substrate are formed by sequential coatings of molybdenum and nickel, which are heated to diffuse the nickel. A pure gold paste is applied by screen printing, for example, followed by the step of firing to burn out the paste binder and to sinter the pure gold particles onto a dense low porosity structure. The sintering operation converts the Ni film into a continuous Au-Ni solid solution. During pin braze, Ni-Sn intermetallics are dispersed in a gold rich matrix of the Au-Ni solid solution.
摘要:
In integrated circuit fabrication a method is provided involving the utilization of the same positive photoresist layer to form two different masks used in two separate etching steps. A positive photoresist layer is formed on a substrate, and portions of the positive photoresist layer are selectively exposed and developed to form the photoresist mask having a pattern of openings therethrough exposing the underlying substrate. Then, the substrate exposed in these openings is etched to form the pattern of recesses in the substrate corresponding to the openings. Next, portions of the remaining photoresist layer respectively adjacent to openings in the photoresist layer are exposed and developed to laterally expand such openings, after which the substrate exposed in these expanded openings is etched whereby the portions of the recesses underlying the original openings are etched deeper than the portions of the recesses underlying the expanded portions of said openings. The result is a two-level recess pattern.In accordance with an important aspect of the disclosure, the substrate being etched is a layer of electrically insulative material formed over an integrated semiconductor circuit member, and the deeper portions of the recesses are etched completely through the insulative layer to form holes which may be used for the passage of contacts to a semiconductor substrate where the insulative layer is directly on the substrate or as via holes when the insulative layer is formed between two layers of integrated circuit metallurgy.