公开(公告)号：US20080185624A1

公开(公告)日：2008-08-07

申请号：US12100042

申请日：2008-04-09

申请人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

发明人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

IPC分类号： H01L29/94

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

摘要： Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening there through on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

摘要翻译： 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模制氧化物层，选择性地去除部分 模制氧化物层以在接触塞上方形成凹陷，在凹陷的底表面和侧表面上形成钛层，在钛层上形成氮化钛层，并在氮化钛层上形成氮氧化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

公开(公告)号：US07364967B2

公开(公告)日：2008-04-29

申请号：US11266520

申请日：2005-11-03

申请人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

发明人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

IPC分类号： H01L21/8242

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

摘要： Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

摘要翻译： 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模压氧化层，选择性地去除模制件的部分 在接触塞上方形成凹部，在凹部的底面和侧面形成钛层，在钛层上形成氮化钛层，在氮化钛层上形成氮化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

公开(公告)号：US20060099760A1

公开(公告)日：2006-05-11

申请号：US11266520

申请日：2005-11-03

申请人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

发明人： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

IPC分类号： H01L21/8242

CPC分类号： H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

摘要： Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

摘要翻译： 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模压氧化层，选择性地去除模制件的部分 在接触塞上方形成凹部，在凹部的底面和侧面形成钛层，在钛层上形成氮化钛层，在氮化钛层上形成氮化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

公开(公告)号：US20060014385A1

公开(公告)日：2006-01-19

申请号：US11173771

申请日：2005-06-30

申请人： Rak-Hwan Kim ,  Hyun-Seok Lim ,  Young-Joo Cho ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee

发明人： Rak-Hwan Kim ,  Hyun-Seok Lim ,  Young-Joo Cho ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee

IPC分类号： H01L21/20 ,  H01L21/44

CPC分类号： C23C16/45529 ,  C23C16/34 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75 ,  H01L28/91

摘要： A method of fabricating a storage capacitor includes depositing a first titanium nitride layer on a dielectric layer using a chemical vapor deposition technique or an atomic layer deposition technique performed at a first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas at a predetermined flow ratio and depositing a second titanium nitride layer on the first titanium nitride layer using a chemical vapor deposition process performed at a second temperature that is greater than the first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas.

摘要翻译： 一种制造存储电容器的方法包括使用化学气相沉积技术或在第一温度下用氯化钛（TiCl 4）的反应气体进行的原子层沉积技术在电介质层上沉积第一氮化钛层 >）气体和氨（NH 3）气体，并且在第一氮化钛层上沉积第二氮化钛层，使用在大于 第一温度与氯化钛（TiCl 4 N 3）气体和氨（NH 3）3气体的反应气体反应。

公开(公告)号：US07524724B2

公开(公告)日：2009-04-28

申请号：US11173771

申请日：2005-06-30

申请人： Rak-Hwan Kim ,  Hyun-Seok Lim ,  Young-Joo Cho ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee

发明人： Rak-Hwan Kim ,  Hyun-Seok Lim ,  Young-Joo Cho ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee

IPC分类号： H01L21/20

CPC分类号： C23C16/45529 ,  C23C16/34 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75 ,  H01L28/91

摘要： A method of fabricating a storage capacitor includes depositing a first titanium nitride layer on a dielectric layer using a chemical vapor deposition technique or an atomic layer deposition technique performed at a first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas at a predetermined flow ratio and depositing a second titanium nitride layer on the first titanium nitride layer using a chemical vapor deposition process performed at a second temperature that is greater than the first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas.

摘要翻译： 一种制造存储电容器的方法包括使用化学气相沉积技术或在第一温度下用氯化钛（TiCl 4）气体和氨（NH 3））的反应气体进行的原子层沉积技术在电介质层上沉积第一氮化钛层， 气体以预定的流量比并且在第二氮化钛层上沉积第二氮化钛层，所述化学气相沉积工艺是在第二温度下用氯化钛（TiCl 4）气体和氨的反应气体 NH3）气体。

公开(公告)号：US07452783B2

公开(公告)日：2008-11-18

申请号：US11286316

申请日：2005-11-23

申请人： Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

发明人： Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

IPC分类号： H01L21/20

CPC分类号： H01L28/90 ,  H01L27/0207 ,  H01L27/10852 ,  H01L28/75

摘要： In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

摘要翻译： 在具有高介电常数的电容器中，电容器包括圆柱形下电极，电介质层和上电极。 在作为电介质层的下电极的内表面，顶面和外表面上形成金属氧化物层。 第一子电极沿着下电极的轮廓在电介质层的表面上形成，并且第二子电极连续形成在与下电极的顶表面对应的第一子电极上，因此开口部分 的下部电极被第二子电极覆盖。 第一和第二子电极分别包括施加第一和第二应力的第一和第二金属氮化物层。 第一和第二个应力的方向彼此相反。 因此，在具有高介电常数的上电极中破裂最小化，从而减少电流泄漏。

公开(公告)号：US07719045B2

公开(公告)日：2010-05-18

申请号：US12251352

申请日：2008-10-14

申请人： Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

发明人： Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

IPC分类号： H01L27/108

CPC分类号： H01L28/90 ,  H01L27/0207 ,  H01L27/10852 ,  H01L28/75

摘要： In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

摘要翻译： 在具有高介电常数的电容器中，电容器包括圆柱形下电极，电介质层和上电极。 在作为电介质层的下电极的内表面，顶面和外表面上形成金属氧化物层。 第一子电极沿着下电极的轮廓在电介质层的表面上形成，并且第二子电极连续形成在与下电极的顶表面对应的第一子电极上，因此开口部分 的下部电极被第二子电极覆盖。 第一和第二子电极分别包括施加第一和第二应力的第一和第二金属氮化物层。 第一和第二个应力的方向彼此相反。 因此，在具有高介电常数的上电极中破裂最小化，从而减少电流泄漏。

公开(公告)号：US20060113580A1

公开(公告)日：2006-06-01

申请号：US11286316

申请日：2005-11-23

申请人： Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

发明人： Young-Joo Cho ,  Hyun-Seok Lim ,  Rak-Hwan Kim ,  Jung-Wook Kim ,  Hyun-Suk Lee

IPC分类号： H01L21/00

CPC分类号： H01L28/90 ,  H01L27/0207 ,  H01L27/10852 ,  H01L28/75

摘要： In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

摘要翻译： 在具有高介电常数的电容器中，电容器包括圆柱形下电极，电介质层和上电极。 在作为电介质层的下电极的内表面，顶面和外表面上形成金属氧化物层。 第一子电极沿着下电极的轮廓在电介质层的表面上形成，并且第二子电极连续形成在与下电极的顶表面对应的第一子电极上，因此开口部分 的下部电极被第二子电极覆盖。 第一和第二子电极分别包括施加第一和第二应力的第一和第二金属氮化物层。 第一和第二个应力的方向彼此相反。 因此，在具有高介电常数的上电极中破裂最小化，从而减少电流泄漏。

公开(公告)号：US07504725B2

公开(公告)日：2009-03-17

申请号：US10915871

申请日：2004-08-09

申请人： Rak-Hwan Kim ,  Young-Cheon Kim ,  Hyeon-Deok Lee ,  Hyun-Young Kim ,  In-Sun Park

发明人： Rak-Hwan Kim ,  Young-Cheon Kim ,  Hyeon-Deok Lee ,  Hyun-Young Kim ,  In-Sun Park

IPC分类号： H01L23/52

CPC分类号： H01L23/485 ,  H01L21/28556 ,  H01L21/76841 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76862 ,  H01L21/76876 ,  H01L27/10885 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor memory device and a method of manufacturing the semiconductor memory device, in which a bit line can have a low resistance without an increase in the thickness of the bit line. In the semiconductor memory device, an insulating layer having a contact hole that exposes a conductive region is formed on a semiconductor substrate having the conductive region. A barrier metal layer is formed along the surface of the insulating layer and the surface of the contact hole. A grain control layer is formed between the barrier metal layer and the tungsten layer. A tungsten layer is formed on the grain control layer. A grain size of the tungsten layer is increased by the grain control layer.

摘要翻译： 一种半导体存储器件和半导体存储器件的制造方法，其中位线可以具有低电阻而不增加位线的厚度。 在半导体存储器件中，在具有导电区域的半导体衬底上形成具有暴露导电区域的接触孔的绝缘层。 沿着绝缘层的表面和接触孔的表面形成阻挡金属层。 在阻挡金属层与钨层之间形成晶粒控制层。 在晶粒控制层上形成钨层。 钨层的晶粒尺寸由晶粒控制层增加。

公开(公告)号：US20050042829A1

公开(公告)日：2005-02-24

申请号：US10915871

申请日：2004-08-09

申请人： Rak-Hwan Kim ,  Young-Cheon Kim ,  Hyeon-Deok Lee ,  Hyun-Young Kim ,  In-Sun Park

发明人： Rak-Hwan Kim ,  Young-Cheon Kim ,  Hyeon-Deok Lee ,  Hyun-Young Kim ,  In-Sun Park

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8242 ,  H01L23/485

CPC分类号： H01L23/485 ,  H01L21/28556 ,  H01L21/76841 ,  H01L21/76846 ,  H01L21/7685 ,  H01L21/76862 ,  H01L21/76876 ,  H01L27/10885 ,  H01L2221/1078 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor memory device and a method of manufacturing the semiconductor memory device, in which a bit line can have a low resistance without an increase in the thickness of the bit line. In the semiconductor memory device, an insulating layer having a contact hole that exposes a conductive region is formed on a semiconductor substrate having the conductive region. A barrier metal layer is formed along the surface of the insulating layer and the surface of the contact hole. A grain control layer is formed between the barrier metal layer and the tungsten layer. A tungsten layer is formed on the grain control layer. A grain size of the tungsten layer is increased by the grain control layer.

摘要翻译： 一种半导体存储器件和半导体存储器件的制造方法，其中位线可以具有低电阻而不增加位线的厚度。 在半导体存储器件中，在具有导电区域的半导体衬底上形成具有暴露导电区域的接触孔的绝缘层。 沿着绝缘层的表面和接触孔的表面形成阻挡金属层。 在阻挡金属层与钨层之间形成晶粒控制层。 在晶粒控制层上形成钨层。 钨层的晶粒尺寸由晶粒控制层增加。