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公开(公告)号：US20200186101A1
公开(公告)日：2020-06-11
申请号：US16709828
申请日：2019-12-10
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
Abstract: An amplification circuit includes an input terminal, an output terminal, a capacitor, a bias unit, an amplification unit, and an impedance unit. The input terminal receives a radio frequency signal. The capacitor is coupled to the input terminal and the bias unit. The bias unit includes a transistor for controlling the bias current. The transistor has a first terminal for receiving a system voltage, and a control terminal coupled to the reference voltage terminal. The amplification unit has an input terminal coupled to the capacitor and the bias unit, and an output terminal coupled to the output terminal of the amplification circuit. The impedance unit has a first terminal coupled to the bias unit, and a second terminal coupled to the input terminal of the amplification circuit and the capacitor. The impedance unit adjusts the amplifying linearity of the amplification circuit according to a selection signal.
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公开(公告)号：US10931239B2
公开(公告)日：2021-02-23
申请号：US16273077
申请日：2019-02-11
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
Abstract: An amplification circuit includes an input terminal for receiving a radio frequency input signal, an output terminal for outputting an amplified radio frequency signal, a bias circuit for providing a bias voltage, an impedance circuit, a transistor, and a filter circuit. The impedance circuit is coupled to the bias circuit and the input terminal, and provides a voltage drop between the first terminal and the second terminal of the impedance circuit. The first transistor has a first terminal coupled to the output terminal, a second terminal coupled to a first reference voltage terminal, and a control terminal coupled to the impedance circuit and for receiving the radio frequency input signal. The filter circuit is coupled to the first transistor and the impedance circuit, filters out a harmonic signal, and provides a feedback signal including a primary frequency signal of the amplified radio frequency signal to the impedance circuit.
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公开(公告)号：US10510748B2
公开(公告)日：2019-12-17
申请号：US15638351
申请日：2017-06-29
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Tsung-Han Lee , Chang-Yi Chen
IPC: H01L27/06
Abstract: A transistor includes a first doping well, a second doping well, a first doping area, a second doping area, a gate layer, and at least one compensation capacitor. The first doping well and the second doping well are formed in a structure layer. The first doping area and the second doping area are formed in the first doping well and have a first conductivity type, the second doping well has a second conductivity type, and the first doping area is used for transmitting the signal. The at least one compensation capacitor is used for adjusting a voltage drop of a parasitic junction capacitor between the first doping area and the first doping well, a voltage drop of a parasitic junction capacitor between the first doping well and the second doping well, or a voltage drop of a parasitic junction capacitor between the second doping well and the structure layer.
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公开(公告)号：US20180294778A1
公开(公告)日：2018-10-11
申请号：US16008054
申请日：2018-06-14
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
CPC classification number: H03F1/56 , H03F1/0277 , H03F1/223 , H03F3/16 , H03F3/193 , H03F3/72 , H03F2200/294 , H03F2200/387 , H03F2200/555 , H03F2203/7239
Abstract: An amplifier includes an input terminal for receiving an input signal, an output terminal for outputting an output signal, a first transistor, a second transistor having a first terminal coupled to a second terminal of the first transistor, a third transistor having a first terminal coupled to a second terminal of the second transistor, a capacitor coupled between a control terminal and a second terminal of the third transistor, a bias circuit coupled to the first terminal of the third transistor for providing a bias voltage to the third transistor, a fourth transistor having a first terminal coupled to the input terminal and a second terminal coupled to the output terminal for providing a bypass path, and a fifth transistor having a first terminal coupled to the first terminal of the first transistor and a second terminal coupled to the output terminal.
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公开(公告)号：US20170279417A1
公开(公告)日：2017-09-28
申请号：US15469566
申请日：2017-03-26
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
CPC classification number: H03F1/56 , H03F1/0277 , H03F1/223 , H03F3/16 , H03F3/193 , H03F3/72 , H03F2200/294 , H03F2200/387 , H03F2200/555 , H03F2203/7239
Abstract: An amplifier includes an input terminal for receiving an input signal, an output terminal for outputting an output signal, a first transistor, a second transistor having a first terminal coupled to a second terminal of the first transistor, a third transistor having a first terminal coupled to a second terminal of the second transistor, a capacitor coupled between a control terminal and a second terminal of the third transistor, a bias circuit coupled to the first terminal of the third transistor for providing a bias voltage to the third transistor, a fourth transistor having a first terminal coupled to the input terminal and a second terminal coupled to the output terminal for providing a bypass path, and a fifth transistor having a first terminal coupled to the first terminal of the first transistor and a second terminal coupled to the output terminal.
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Patent Agency Ranking
公开(公告)号：US10027289B2
公开(公告)日：2018-07-17
申请号：US15469566
申请日：2017-03-26
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
CPC classification number: H03F1/56 , H03F1/0277 , H03F1/223 , H03F3/16 , H03F3/193 , H03F3/72 , H03F2200/294 , H03F2200/387 , H03F2200/555 , H03F2203/7239
Abstract: An amplifier includes an input terminal for receiving an input signal, an output terminal for outputting an output signal, a first transistor, a second transistor having a first terminal coupled to a second terminal of the first transistor, a third transistor having a first terminal coupled to a second terminal of the second transistor, a capacitor coupled between a control terminal and a second terminal of the third transistor, a bias circuit coupled to the first terminal of the third transistor for providing a bias voltage to the third transistor, a fourth transistor having a first terminal coupled to the input terminal and a second terminal coupled to the output terminal for providing a bypass path, and a fifth transistor having a first terminal coupled to the first terminal of the first transistor and a second terminal coupled to the output terminal.
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公开(公告)号：US20160112015A1
公开(公告)日：2016-04-21
申请号：US14886109
申请日：2015-10-19
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
CPC classification number: H03F1/565 , H01F27/2804 , H01F2019/085 , H01F2027/2809 , H03F3/195 , H03F3/211 , H03F3/45475 , H03F2200/387 , H03F2200/451 , H03F2200/537 , H03F2200/541 , H03F2203/45731
Abstract: A transformer has a first winding, a second winding and a third winding. The first winding is configured to receive a first signal. The second winding is magnetically coupled to the first winding and configured to generate a second signal through electromagnetic induction with the first winding, or by receiving a second input signal. The third winding is magnetically coupled to the second winding, magnetically isolated from the first winding, and configured to generate a third signal through electromagnetic induction with the second winding. The second winding is posited between the first winding and the third winding. The first winding is posited adjacent to the second winding, and the second winding is posited adjacent to the third winding.
Abstract translation: 变压器具有第一绕组，第二绕组和第三绕组。 第一绕组被配置为接收第一信号。 第二绕组被磁耦合到第一绕组，并被配置为通过利用第一绕组的电磁感应产生第二信号，或者通过接收第二输入信号。 第三绕组磁耦合到第二绕组，与第一绕组磁隔离，并且被配置为通过与第二绕组的电磁感应产生第三信号。 第二绕组位于第一绕组和第三绕组之间。 第一绕组被放置成与第二绕组相邻，并且第二绕组被放置成与第三绕组相邻。
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公开(公告)号：US10411657B2
公开(公告)日：2019-09-10
申请号：US16264701
申请日：2019-02-01
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
Abstract: A transformer has a first winding, a second winding, a third winding, a fourth winding and a fifth winding. The fifth winding has a first part and a second part serially connected to the first part. The first part is magnetically coupled to the second winding and magnetically isolated from the first winding, and the second part is magnetically coupled to the fourth winding and magnetically isolated from the third winding. The second winding is positioned between the first winding and the first part, the first winding is positioned adjacent to the second winding, and the second winding is positioned adjacent to the first part. The fourth winding is positioned between the third winding and the second part, the third winding is positioned adjacent to the fourth winding, and the fourth winding is positioned adjacent to the second part.
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公开(公告)号：US20180076194A1
公开(公告)日：2018-03-15
申请号：US15638351
申请日：2017-06-29
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Tsung-Han Lee , Chang-Yi Chen
IPC: H01L27/06
CPC classification number: H01L27/0629 , H01L29/7833
Abstract: A transistor includes a first doping well, a second doping well, a first doping area, a second doping area, a gate layer, and at least one compensation capacitor. The first doping well and the second doping well are formed in a structure layer. The first doping area and the second doping area are formed in the first doping well and have a first conductivity type, the second doping well has a second conductivity type, and the first doping area is used for transmitting the signal. The at least one compensation capacitor is used for adjusting a voltage drop of a parasitic junction capacitor between the first doping area and the first doping well, a voltage drop of a parasitic junction capacitor between the first doping well and the second doping well, or a voltage drop of a parasitic junction capacitor between the second doping well and the structure layer.
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公开(公告)号：US11146218B2
公开(公告)日：2021-10-12
申请号：US16709828
申请日：2019-12-10
Applicant: RichWave Technology Corp.
Inventor： Chih-Sheng Chen , Chang-Yi Chen
Abstract: An amplification circuit includes an input terminal, an output terminal, a capacitor, a bias unit, an amplification unit, and an impedance unit. The input terminal receives a radio frequency signal. The capacitor is coupled to the input terminal and the bias unit. The bias unit includes a transistor for controlling the bias current. The transistor has a first terminal for receiving a system voltage, and a control terminal coupled to the reference voltage terminal. The amplification unit has an input terminal coupled to the capacitor and the bias unit, and an output terminal coupled to the output terminal of the amplification circuit. The impedance unit has a first terminal coupled to the bias unit, and a second terminal coupled to the input terminal of the amplification circuit and the capacitor. The impedance unit adjusts the amplifying linearity of the amplification circuit according to a selection signal.
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