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1.发明授权
公开(公告)号：US4275653A
公开(公告)日：1981-06-30
申请号：US115855
申请日：1980-01-28
摘要： A printer system comprising a belt printer mechanism controlled by a stored program digital microprocessor to print lines of data on a print medium. Selective operation of a linear array of print hammers, paper feeding, data conversion and arranging in scan/subscan order are performed by the microprocessor. The fire data for operating hammers is precalculated and arranged in scan/subscan order during the print medium feeding interval with printing occurring immediately at the first print scan after print medium motion in which one or more desired characters become aligned with print hammers. An indirect addressing technique which eliminates sorting is used to arrange the print position fire data in scan/subscan order.
摘要翻译： 一种打印机系统，包括由存储的程序数字微处理器控制的带打印机机构，以在打印介质上打印数据行。 微处理器执行打印锤线性阵列，进纸，数据转换和扫描/副扫描顺序的选择性操作。 用于操作锤的火灾数据在打印介质进给间隔期间以扫描/副扫描顺序被预先计算和排列，其中在打印介质运动之后立即在第一打印扫描中发生打印介质运动，其中一个或多个所需字符与打印锤对齐。 用于排除排序的间接寻址技术用于以扫描/副扫描顺序排列打印位置火灾数据。
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2.发明授权Printer system having parity checking of print hammers using software control 失效打印机系统使用软件控制对打印锤进行奇偶校验
公开(公告)号：US4335460A
公开(公告)日：1982-06-15
申请号：US115841
申请日：1980-01-28
摘要： A printer control system for a belt printer has an arrangement for checking print hammer operating circuits by comparing a real time actual parity of the circuits with a precalculated expected parity. Prior to printing, a microprocessor calculates expected parity bytes for each subscan for storage in a storage device along with the print position fire data used for selecting the operating circuits to be activated in the related subscans. An actual parity byte is generated on a real time basis by ODD/EVEN parity circuits associated with groups of operating circuits for comparison with a composite parity byte generated each subscan by the microprocessor. The composite parity byte is generated by combining the expected parity bytes from the storage device for several successive subscans. The composite parity byte is updated each subscan by a process of subtracting the initial expected parity byte and adding a new subscan expected parity byte. Comparison is made when all the activating circuits are in stable condition.
摘要翻译： 用于带式打印机的打印机控制系统具有通过将电路的实时实际奇偶校验与预先计算的预期奇偶校验进行比较来检查打印锤操作电路的布置。 在打印之前，微处理器计算用于存储在存储设备中的每个副扫描的预期奇偶校验字节以及用于选择要在相关副扫描程序中被激活的操作电路的打印位置火灾数据。 通过与操作电路组相关联的ODD / EVEN奇偶校验电路实时生成实际奇偶校验字节，以与由微处理器生成的每个副扫描的复合奇偶校验字节进行比较。 通过将来自存储设备的预期奇偶校验字节组合用于几个连续副扫描器来生成复合奇偶校验字节。 复合奇偶校验字节通过减去初始预期奇偶校验字节并添加新的副扫描期望奇偶校验位的处理来更新每个子表。 当所有激活电路处于稳定状态时进行比较。
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公开(公告)号：US4273041A
公开(公告)日：1981-06-16
申请号：US115856
申请日：1980-01-28
摘要： A belt printer control system for attachment to a host system has a first microprocessor connected by a dedicated bus to the host system and control elements operable to perform carriage control, belt drive, and ribbon drive operations of the printer mechanism. A second microprocessor is connected by a dedicated bus structure to controls for operating the print hammers. A common RAM is accessed by the two microprocessors through a common bus structure. The first microprocessor passes control and print information to the RAM for use by the second microprocessor in building print algorithm tables in the RAM for use by the second microprocessor to operate the print hammers. Communication between the microprocessors is done through control information stored by the microprocessors in the common RAM. Storing printing information and building of tables and controlling printing and nonprinting operations of the print mechanism are done concurrently.
摘要翻译： 用于连接到主机系统的皮带打印机控制系统具有通过专用总线连接到主机系统的第一微处理器和可操作以执行打印机机构的托架控制，皮带驱动和色带驱动操作的控制元件。 第二微处理器通过专用总线结构连接到用于操作打印锤的控制。 两个微处理器通过公共总线结构访问公共RAM。 第一个微处理器将控制和打印信息传递给RAM供第二个微处理器使用，以构建RAM中的打印算法表，供第二个微处理器使用以操作打印锤。 通过微处理器在公共RAM中存储的控制信息来实现微处理器之间的通信。 同时进行打印信息的存储和打印机构的打印和非打印操作的控制。
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4.发明授权Robust frequency management and acquisition in a wireless local area network that uses frequency-hopping radios 失效在使用跳频无线电的无线局域网中进行稳健的频率管理和采集
公开(公告)号：US5533025A
公开(公告)日：1996-07-02
申请号：US313516
申请日：1994-09-26
CPC分类号： H04W74/0816 , H04B1/7156 , H04B2001/71563 , H04W84/12
摘要： A method for use in a single cell of a wireless communication system of the type having a leader station that coordinates communication among a plurality of remote stations that are in the cell. The method applies to systems that use slow frequency-hopping radios and a Carrier Sense Multiple Access (CSMA) type protocol. In this context, the method allows a remote station to initially acquire the frequency-hopping pattern and time base of the leader station and to maintain frequency synchronization in the face of control information loss due to radio transmission effects (e.g., interference, noise or multipath fading). In the acquisition phase, the remote station actively generates probe messages that are sent to the leader station so as to rapidly achieve frequency synchronization with the leader station.
摘要翻译： 一种在具有协调在小区内的多个远程站之间的通信的前导站的类型的无线通信系统的单个小区中使用的方法。 该方法适用于使用慢跳频无线电和载波侦听多路访问（CSMA）类型协议的系统。 在这种情况下，该方法允许远程站最初获取引导站的跳频模式和时基，并且由于无线电传输效应（例如，干扰，噪声或多径）而面对控制信息丢失而保持频率同步 衰退）。 在采集阶段，远程站主动生成发送给引导站的探测消息，以便快速实现与引导站的频率同步。
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5.发明授权Method and apparatus for digital frequency compensation of carrier drift in a PSK demodulator 失效PSK解调器载波漂移的数字频率补偿方法和装置
公开(公告)号：US5533069A
公开(公告)日：1996-07-02
申请号：US329362
申请日：1994-10-26
IPC分类号： H04L27/22 , H04L7/033 , H04L27/233 , H04L27/06
CPC分类号： H04L27/2337 , H04L7/0331
摘要： A carrier sensing circuit coupled to a receiving amplifier, measures the frequency of a phase shift modulated carrier signal by counting a predetermined number of the pulses for a measured interval whose duration is determined by counting a first clock count value. A demodulator coupled to the amplifier, detects when the spacing between the edges of the square wave pulses changes in response to the phase shift modulation. The demodulator measures first intervals between consecutive rising edges of the received signal, by counting clock pulses for a second selected interval whose duration is determined by a second selected count value. The demodulator further measures second intervals between consecutive falling edges of the received signal by counting clock pulses for a third selected interval whose duration is determined by a third selected count value. A compensating circuit coupled to the carrier sensing circuit and to the demodulator, compensates for frequency drift in the carrier signal or in the local oscillator by adjusting the second selected count value and the third selected count value, using the first clock count value.
摘要翻译： 耦合到接收放大器的载波感测电路通过对其持续时间通过计数第一时钟计数值确定的测量间隔计数预定数量的脉冲来测量相移调制载波信号的频率。 耦合到放大器的解调器检测方波脉冲的边缘之间的间隔何时响应于相移调制而改变。 解调器通过对持续时间由第二选择的计数值确定的第二选定间隔的时钟脉冲进行计数来测量接收信号的连续上升沿之间的第一间隔。 解调器还通过对持续时间由第三选择的计数值确定的第三选定间隔计数时钟脉冲来测量接收信号的连续下降沿之间的第二间隔。 耦合到载波感测电路和解调器的补偿电路使用第一时钟计数值来调整第二选择的计数值和第三选择的计数值来补偿载波信号或本地振荡器中的频率漂移。
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公开(公告)号：US5561689A
公开(公告)日：1996-10-01
申请号：US329364
申请日：1994-10-26
IPC分类号： H04L27/20 , H04L27/18 , H04L27/233
CPC分类号： H04L27/18
摘要： The oscillator at the sending node of a wireless digital network, generates a carrier signal, starting at a first instant. A modulator coupled to the oscillator performs phase shift modulating of the carrier signal with an input signal. A spoiler signal generator is coupled to the modulator, for providing a spoiler signal as the input signal, starting at the first instant and continuing for a first duration which is longer than a period needed for the oscillator to achieve stable characteristics. A transmitter is coupled to the modulator at the sending node, for transmitting a wireless radio signal representation of the carrier signal phase shift modulated with the spoiler signal to a receiver at a receiving node. The spoiler signal in the modulated carrier signal interrupts the periodic characteristic of the pulses, and thereby prevents the carrier sensor from detecting the carrier signal. Further, the spoiler signal ceases to modulate the carrier signal after the first duration when the oscillator has achieved stable characteristics, thereby enabling the carrier sensor to detect the carrier signal.
摘要翻译： 在无线数字网络的发送节点处的振荡器从第一时刻开始产生载波信号。 耦合到振荡器的调制器利用输入信号执行载波信号的相移调制。 扰流器信号发生器耦合到调制器，用于提供作为输入信号的扰流信号，从第一时刻开始，并且持续比第一持续时间长的时间长于振荡器实现稳定特性所需的周期。 发射机在发送节点处耦合到调制器，用于将在扰流信号调制的载波信号相移的无线电信号表示发射到接收节点处的接收机。 调制载波信号中的扰流信号中断脉冲的周期特性，从而防止载波传感器检测载波信号。 此外，当振荡器达到稳定特性时，扰流信号在第一持续时间之后停止调制载波信号，从而使得载波传感器能够检测载波信号。
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公开(公告)号：US4448123A
公开(公告)日：1984-05-15
申请号：US394054
申请日：1982-06-30
申请人： Arthur E. Fleek , Samuel C. Tseng
发明人： Arthur E. Fleek , Samuel C. Tseng
摘要： A variable speed printing (VSP) adaptor for a dot matrix printer which includes a monitoring means having a plurality of devices each capable of assuming one of two states. The monitoring means monitors the state of the pattern data to be printed, and, in the preferred embodiment, the monitoring means comprises a counter which is preset with a number equal to the number of column scans with a dot print line. The pattern data to be printed is scanned in a forward direction, i.e., in the normal printing direction starting at the first print position and the count in the counter is decremented one count for each column data scanned. During the time interval between when this data is latched and the actual hammer actuation, the pattern data is scanned in the backward direction starting at the last print position. Each time the column data for a backward scan is zero, i.e., no dot to be printed, prior to sensing a non-zero column, the count in the counter is decremented one count. The printing operation continues in the interleaved forward/backward scans until the count in the counter reaches a reference level such as zero. Upon sensing this reference level in the counter, a control signal is generated which indicates that the printing of the dot row is complete and initiates movement of the paper to the next dot row position. In an alternate embodiment, the monitoring means comprises a random access storage device.
摘要翻译： 一种用于点阵式打印机的变速打印（VSP）适配器，其包括具有多个装置的监视装置，每个装置能够承担两种状态之一。 监视装置监视要打印的图案数据的状态，并且在优选实施例中，监视装置包括预设有与点打印行相等于列扫描数的计数器。 要打印的图案数据沿着从第一打印位置开始的正向扫描方向，即在从第一打印位置开始的正常打印方向上扫描，并且计数器中的计数对于扫描的每列数据减少一个计数。 在该数据被锁存和实际的锤击致动之间的时间间隔期间，从最后的打印位置开始沿着向后方向扫描图案数据。 每次反向扫描的列数据为零时，即不要打印的点，在感测非零列之前，计数器中的计数减1计数。 打印操作在交错的正向/反向扫描中继续进行，直到计数器中的计数达到诸如零的参考水平。 在计数器中感测到该参考电平时，产生指示点阵列的打印完成并且启动纸张到下一个点行位置的控制信号。 在替代实施例中，监视装置包括随机存取存储装置。
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8.发明授权Phase demodulation method and apparatus for a wireless LAN, by counting the IF period 失效通过对IF周期进行计数，对无线LAN进行相位解调方法和装置
公开(公告)号：US5875212A
公开(公告)日：1999-02-23
申请号：US329363
申请日：1994-10-26
IPC分类号： G06F13/00 , H04L27/20 , H04L27/233 , H04L27/18
CPC分类号： H04L27/2337
摘要： A phase shift modulator at the transmitter has a control input connected to a binary signal source. A high frequency carrier signal is applied to a carrier signal input of the modulator. The modulated carrier signal is transmitted to a receiver where it is mixed with a local oscillator frequency. At the receiver, a modulated signal is amplified by a limit amplifier to form the received signal into square wave pulses of a uniform height. The demodulator detects when the spacing between the edges of the square wave signal change in response to the phase shift modulation at the transmitter. When the spacing between the edges of the square wave IF signal is detected to be shorter than the normal spacing for a steady IF signal with no modulation, this signifies a first binary value. A longer than normal spacing between the edges of the square wave IF signal signifies a second binary value. Frequency drift compensation circuits are disclosed to overcome frequency variations in the carrier and the local oscillator.
摘要翻译： 发射机处的相移调制器具有连接到二进制信号源的控制输入。 高频载波信号被施加到调制器的载波信号输入端。 调制载波信号被发送到与本地振荡器频率混合的接收机。 在接收机处，调制信号被限幅放大器放大，以将接收到的信号形成均匀高度的方波脉冲。 解调器检测方波信号的边缘之间的间隔何时响应于发射机的相移调制而改变。 当对于没有调制的稳定IF信号，检测到方波IF信号的边缘之间的间隔比正常间隔短时，这意味着第一个二进制值。 方波IF信号的边缘之间比正常的间隔长，表示第二二进制值。 频率漂移补偿电路被公开以克服载波和本地振荡器中的频率变化。
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公开(公告)号：US5867533A
公开(公告)日：1999-02-02
申请号：US702412
申请日：1996-08-14
IPC分类号： H04L12/28 , H04L27/233 , H04L12/413 , H04L27/18
CPC分类号： H04W74/0808 , H04L27/2332 , H04W84/12 , Y10S370/91
摘要： An apparatus and a method for detecting a carrier signal of a phase shift keyed modulated signal. A first counter circuit generates a plurality of counts, with each count being a number of cycles of a reference frequency signal occurring between two consecutive rising edges of an intermediate frequency signal. A comparison circuit compares a first count of reference frequency cycles to a second count of reference frequency cycles when a difference between an initial count of reference frequency cycles and a first predetermined number is less than a second predetermined number. The first predetermined number represents a time period of one cycle of the nominal center frequency, and the first count and the second count respectively represent time periods of first and second cycles of a pair of consecutive cycles of the intermediate frequency signal. The comparison circuit generates a difference signal when a difference between the first count and the second count is less than a third predetermined number. A second counter circuit counts cycles of the intermediate frequency signal and generates a carrier detect signal when a count of the intermediate frequency signal cycles equals a fourth predetermined number.
摘要翻译： 一种用于检测相移键控调制信号的载波信号的装置和方法。 第一计数器电路产生多个计数，每个计数是在中频信号的两个连续上升沿之间出现的参考频率信号的周期数。 当参考频率周期的初始计数与第一预定数量之间的差小于第二预定数量时，比较电路将参考频率周期的第一计数与参考频率周期的第二计数进行比较。 第一预定数字表示标称中心频率的一个周期的时间段，第一计数和第二计数分别表示中频信号的一对连续周期的第一和第二周期的时间段。 当第一计数和第二计数之间的差小于第三预定数时，比较电路产生差分信号。 第二计数器电路对中频信号的周期进行计数，并且当中频信号周期的计数等于第四预定数时产生载波检测信号。
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公开(公告)号：US4277191A
公开(公告)日：1981-07-07
申请号：US115850
申请日：1980-01-28
申请人： Glenn W. Davis , Arthur E. Fleek
发明人： Glenn W. Davis , Arthur E. Fleek
CPC分类号： B41J19/202
摘要： A control system for the carriage drive of a line printer includes a microprocessor which controls a carriage drive stepper motor through programmable timers and interface adapter along with other non-print units of a printer mechanism. A control counter in the carriage drive responsive to feedback pulses from the stepper motor coacts with the timers to control various operation of the stepper motor during line feeding of a print medium and is used by the microprocessor for preventing loss of control of the carriage drive due to interrupts from other devices.
摘要翻译： 用于行式打印机的托架驱动器的控制系统包括微处理器，其通过可编程定时器和接口适配器以及打印机机构的其它非打印单元来控制托架驱动步进马达。 滑架驱动器中的控制计数器响应来自步进电机的反馈脉冲与定时器共同作用，以控制步进马达在打印介质的馈线期间的各种操作，并被微处理器用于防止由于 从其他设备中断。
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