Combined silicon oxide etch and contamination removal process
    1.
    发明授权
    Combined silicon oxide etch and contamination removal process 有权
    组合氧化硅蚀刻和污染去除过程

    公开(公告)号:US08664012B2

    公开(公告)日:2014-03-04

    申请号:US13250960

    申请日:2011-09-30

    IPC分类号: H01L21/02

    摘要: A method of forming a semiconductor device. A substrate having first and second materials is provided, wherein the second material is occluded by the first material. The substrate is etched using a first non-plasma etch process that etches the first material at a higher rate relative to a rate of etching the second material. The first non-plasma etch process exposes the second material that is overlying at least a portion of the first material. The second material is then etched using a plasma containing a reactive gas, which exposes the at least a portion of the first material. The first material including the at least a portion of the first material that was exposed by etching the second material are etched using a second non-plasma etch process.

    摘要翻译: 一种形成半导体器件的方法。 提供了具有第一和第二材料的基板,其中第二材料被第一材料遮挡。 使用第一非等离子体蚀刻工艺蚀刻衬底,相对于蚀刻第二材料的速率,蚀刻第一材料的速率更高。 第一非等离子体蚀刻工艺暴露了覆盖第一材料的至少一部分的第二材料。 然后使用包含暴露第一材料的至少一部分的反应性气体的等离子体来蚀刻第二材料。 使用第二非等离子体蚀刻工艺蚀刻包括通过蚀刻第二材料而暴露的第一材料的至少一部分的第一材料。

    COMBINED SILICON OXIDE ETCH AND CONTAMINATION REMOVAL PROCESS
    2.
    发明申请
    COMBINED SILICON OXIDE ETCH AND CONTAMINATION REMOVAL PROCESS 有权
    组合氧化硅蚀刻和污染去除工艺

    公开(公告)号:US20130084654A1

    公开(公告)日:2013-04-04

    申请号:US13250960

    申请日:2011-09-30

    IPC分类号: H01L21/66 H01L21/3065

    摘要: A method of forming a semiconductor device. A substrate having first and second materials is provided, wherein the second material is occluded by the first material. The substrate is etched using a first non-plasma etch process that etches the first material at a higher rate relative to a rate of etching the second material. The first non-plasma etch process exposes the second material that is overlying at least a portion of the first material. The second material is then etched using a plasma containing a reactive gas, which exposes the at least a portion of the first material. The first material including the at least a portion of the first material that was exposed by etching the second material are etched using a second non-plasma etch process.

    摘要翻译: 一种形成半导体器件的方法。 提供了具有第一和第二材料的基板,其中第二材料被第一材料遮挡。 使用第一非等离子体蚀刻工艺蚀刻衬底,相对于蚀刻第二材料的速率,蚀刻第一材料的速率更高。 第一非等离子体蚀刻工艺暴露了覆盖第一材料的至少一部分的第二材料。 然后使用包含暴露第一材料的至少一部分的反应性气体的等离子体来蚀刻第二材料。 使用第二非等离子体蚀刻工艺蚀刻包括通过蚀刻第二材料而暴露的第一材料的至少一部分的第一材料。