摘要:
A mucosal formulation for administration to mucosal membranes, such as in the mouth, nasal passage, stomach, vagina, etc., is disclosed. The mucosal formulation contains a lipid-pharmaceutical agent complex formed from phospholipids possessing a hydrophobic moiety that orients into a hydrophobic phase and a polar head moiety that orients towards the aqueous phase (i.e., “amphipathic” lipids). When placed in an aqueous medium (e.g., vaginal fluid), the phospholipids form liposomes or other small lipid vesicles (e.g., micelles) that may then be used to deliver pharmaceutical agents into a living organism.
摘要:
An elastomeric article that contains a chromogen that undergoes a detectable change in color in the presence of one or more microbes is provided. For example, in one embodiment, the chromogen is a solvatochromic dye (e.g., Reichardt's dye) that undergoes a color change in the presence of bacteria or other microbes. More specifically, such dyes may respond to differences in polarity between microbe components (e.g., cell membrane, cytoplasm, etc.) and the environment outside the cell. Alternatively, other mechanisms may be wholly or partially responsible for the interaction between the dye and the microbe, such as acid-base reactions, redox reactions, and so forth.
摘要:
A precision voltage reference device having a forward biased and reverse biased silicon junctions arranged as a concentric circular annular monolithic structure is described. Selective hardening of the forward biased junction is provided to adjust carrier lifetime in said junction thereby providing a radiation hardened device. The selective hardening is provided by implanting non-dopant species to induce a predetermined amount of lattice damage at the forward biased junction. This arrangement permits both the forward biased junction and the reverse biased junction to be fabricated on a common substrate.
摘要:
The invention provides an apparatus and method for automatically opening a plastic bag-type liner as part of a container lining process. The apparatus comprises at least one movable jaw assembly disposed on each side of the liner to be opened and a tongue on the other side of the liner opposing each jaw assembly. To open the bag, the jaws are opened and the jaw assemblies are moved toward and contact the liner and the opposing tongue pushes the liner between the gripping surfaces of the jaws of the opposing jaw assembly; as the jaw assemblies begin to move apart, the jaws close, gripping and retaining the layer of liner in direct contact with the gripping surfaces of each jaw, the tongues slide out from between the layers of the liner, separating the sides of the unsealed end of the liner. A stream of air may then be directed into the open end of the bag for completely blowing the bag open prior to placing the bag over the open end of the container to be lined and forcing the liner into the container.
摘要:
A memory controller controls the operation of a number of memory module units and includes a number of queues which couple to the module units. Each queue includes an address queue register, a control queue register and a data queue register. Each address queue register has tristate control for independent operation. Control circuits which couple to the queue address, control and data registers assign memory cycles between queues on an alternate basis when the queue control registers store requests which are being processed. This enables the interleaving of memory requests which eliminates processing delays particularly in cases where such requests involve multiword transfers over successive memory cycles of operation.
摘要:
A memory subsystem which couples to a multiword bus for processing memory requests received therefrom includes at least a pair of independently addressable dynamic memory module units. Each memory unit includes a number of rows of random access memory (RAM) chips. The subsystem further includes an adder circuit, a pair of tri-state operated address register circuits and timing circuits. The address circuits include a pair of tri-state operated address registers which couple to the bus and to the set of address lines to each memory unit. In response to a memory request, the registers store row and column address portions of a chip address of the memory request. A multibit adder circuit is connected to increment by one the low order row address when the least significant address bits of the memory request indicate a subboundary address condition thereby enabling access to a pair of sequential word locations. Whenever a memory request specifies an address which cannot access a double word, boundary circuits upon detecting the condition cause the timing circuits to generate only timing signals necessary for accessing the first word location.
摘要:
A vaginal treatment composition that employs a therapeutic agent to inhibit and/or treat vaginal infection is provided. The therapeutic agent is capable of inhibiting and/or killing Gardnerella (e.g., Gardnerella vaginalis), Candida (e.g., Candida albicans), and/or Trichomonas (e.g., Trichomonas vaginalis) pathogens. Desirably, such antimicrobial efficacy is achieved without substantially inhibiting the growth of Lactobacillus acidophilus. For instance, sugars and/or sugar alcohols may be employed in the present invention as a therapeutic agent for inhibiting and/or treating vaginal infection. In one particular embodiment, D-xylitol is used as the therapeutic agent.
摘要:
A data processing system includes a plurality of memory command generating units which connect to a common bus network with a number of memory subsystems. Each subsystem includes a controller which controls the operation of a number of memory module units and includes a number of queue circuits for storing memory requests to be processed. The memory controller further includes control apparatus connected to monitor bus activity. In response to certain bus activity conditions occurring during multiword transfer operations, the control apparatus operates to lengthen the time between successive multiword transfers of data to the bus so as to ensure that new requestors having lower priorities than a memory controller gain access to an available queue notwithstanding the amount of bus delay incurred in transmitting their memory requests.
摘要:
A memory system includes a plurality of memory controllers which connect to a common bus. Each memory controller includes reconfiguration apparatus which enables the controller when faulty to be switched off line and another controller to be substituted in its place so as to maintain system memory contiguous.