公开(公告)号：US20080265379A1

公开(公告)日：2008-10-30

申请号：US11994406

申请日：2006-06-27

申请人： George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

发明人： George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

IPC分类号： H01L29/04

CPC分类号： H01S5/32341 ,  Y10S438/973

摘要： A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate (201). In an illustrative implementation, a laser diode is oriented on a GaN substrate (201) wherein the GaN substrate includes a GaN (0001) surface off-cut from the direction predominantly towards either the or the family of directions. For a off-cut substrate, a laser diode cavity (207) may be oriented along the direction parallel to lattice surface steps (202) of the substrate (201) in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For off-cut substrate, the laser diode cavity may be oriented along the direction orthogonal to lattice surface steps (207) of the substrate (201) in order to provide a cleave laser facet that is aligned with the surface lattice steps.

摘要翻译： 一种微电子组件，其中半导体器件结构定向地定位在离轴衬底（201）上。 在说明性实施例中，激光二极管定向在GaN衬底（201）上，其中GaN衬底包括从主要朝向<1120>或<11 00>的方向从<0001>方向偏离的GaN（0001） 家庭方向。 对于<11 20>截割基板，激光二极管空腔（207）可以沿着平行于基板（201）的格子表面台阶（202）的<100°方向取向，以便具有切割的激光刻面 这与表面晶格步骤正交。 对于<11 00>切割衬底，激光二极管腔可以沿着与衬底（201）的晶格表面台阶（207）正交的<100°方向取向，以便提供与 表面晶格步骤。

公开(公告)号：US06447604B1

公开(公告)日：2002-09-10

申请号：US09605195

申请日：2000-06-28

申请人： Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

发明人： Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

IPC分类号： C30B2514

CPC分类号： C30B25/02 ,  C30B23/002 ,  C30B23/02 ,  C30B25/00 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/0262 ,  H01L21/02634 ,  H01L21/02636 ,  H01L21/02658 ,  H01L33/32 ,  H01S5/1228 ,  H01S5/1231 ,  H01S5/2095 ,  H01S5/32341

摘要： A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 500 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

摘要翻译： III-V族氮化物同质外延微电子器件结构，其包括III-V族氮化物材料衬底上的III-V族同质外延层，例如独立性。 描述了各种处理技术，包括通过使用III族源材料和氮源材料通过VPE工艺沉积III-V族氮化物同质外延层，在相应的III-V族氮化物材料基板上形成III-V族氮化物同质外延层的方法 在包括约1至约105范围内的V / III比的工艺条件下，氮源材料分压在约1至约103托的范围内，生长温度在约500至约1250摄氏度的范围内 ，并且生长速率在约0.1至约500微米/小时的范围内。 III-V族氮化物同质外延微电子器件结构有用地用于诸如UV LED，高电子迁移率晶体管等的器件应用中。

公开(公告)号：US08378463B2

公开(公告)日：2013-02-19

申请号：US12974332

申请日：2010-12-21

申请人： George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

发明人： George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

IPC分类号： H01L29/04

CPC分类号： H01S5/32341 ,  Y10S438/973

摘要： A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate. In an illustrative implementation, a laser diode is oriented on a GaN substrate wherein the GaN substrate includes a GaN (0001) surface off-cut from the direction predominantly towards either the or the family of directions. For a off-cut substrate, a laser diode cavity may be oriented along the direction parallel to lattice surface steps of the substrate in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For a off-cut substrate, the laser diode cavity may be oriented along the direction orthogonal to lattice surface steps of the substrate in order to provide a cleaved laser facet that is aligned with the surface lattice steps.

摘要翻译： 一种微电子组件，其中半导体器件结构定向地定位在离轴衬底上。 在说明性实施方案中，激光二极管定向在GaN衬底上，其中GaN衬底包括从（0001）方向偏离的GaN（0001）表面，主要朝向<11 20>或<1100> 方向。 对于<11 20>截割衬底，激光二极管空腔可以沿着平行于衬底的晶格表面台阶的<100°方向取向，以便具有与表面晶格步骤正交的切割的激光刻面。 对于<100>切割衬底，激光二极管空腔可以沿着与衬底的晶格表面台阶正交的<100°方向取向，以便提供与表面晶格步骤对准的切割的激光刻面。

公开(公告)号：US08212259B2

公开(公告)日：2012-07-03

申请号：US10313561

申请日：2002-12-06

申请人： Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

发明人： Jeffrey S. Flynn ,  George R. Brandes ,  Robert P. Vaudo ,  David M. Keogh ,  Xueping Xu ,  Barbara E. Landini

IPC分类号： H01L29/20 ,  H01L21/18

CPC分类号： H01L33/32 ,  C30B23/00 ,  C30B25/00 ,  C30B25/02 ,  C30B25/183 ,  C30B29/403 ,  C30B29/406 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262

摘要： A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 102 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

摘要翻译： III-V族氮化物同质外延微电子器件结构，包括沉积在III-V族氮化物材料衬底上，例如具有独特性质的III-V族氮化物同质外延表层，其具有改善的外延质量。 描述了各种处理技术，包括通过使用III族源材料和氮源材料通过VPE工艺沉积III-V族氮化物同质外延层，在相应的III-V族氮化物材料基板上形成III-V族氮化物同质外延层的方法 在包括约1至约105范围内的V / III比的工艺条件下，氮源材料分压在约1至约103托的范围内，生长温度在约500至约1250摄氏度的范围内 ，并且生长速率在约0.1至约102微米/小时的范围内。 III-V族氮化物同质外延微电子器件结构有用地用于诸如UV LED，高电子迁移率晶体管等的器件应用中。

公开(公告)号：US07700203B2

公开(公告)日：2010-04-20

申请号：US12102275

申请日：2008-04-14

申请人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

发明人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

IPC分类号： B32B18/00 ,  B32B11/08

CPC分类号： C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L29/045 ,  H01L29/2003 ,  Y10T83/0524 ,  Y10T428/31

摘要： A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the direction predominantly toward a direction selected from the group consisting of and directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 μm2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm−2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

摘要翻译： III-V族氮化物，例如GaN，衬底，其包括从<0001>方向切除的（0001）表面主要朝向选自<10-10>和<11-20>方向的方向切割 在约0.2至约10度的范围内的角度，其中该表面具有通过50×50μm2 AFM扫描测量的RMS粗糙度小于1nm，位错密度小于3E6cm-2。 可以通过在对应的邻位异质外延基底（例如切断蓝宝石）上的基底主体的切削研磨或生长来对对应的原子块或晶片坯料进行切割切片来形成基底。 在制造III-V族氮化物微电子和光电子器件时，该衬底有效地用于同质外延沉积。

公开(公告)号：US07390581B2

公开(公告)日：2008-06-24

申请号：US11431990

申请日：2006-05-11

申请人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

发明人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

IPC分类号： B32B9/00 ,  C30B25/00

CPC分类号： C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L29/045 ,  H01L29/2003 ,  Y10T83/0524 ,  Y10T428/31

摘要： A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the direction predominantly toward a direction selected from the group consisting of and directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 μm2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm−2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

摘要翻译： III-V族氮化物，例如GaN，衬底，其包括从<0001>方向切除的（0001）表面主要朝向选自<10-10>和<11-20>方向的方向切割 在约0.2至约10度的范围内的角度，其中表面具有通过50×50μm2μmAFM扫描测量的RMS粗糙度小于1nm，位错密度小于 3E6厘米-2。 可以通过在对应的邻位异质外延基底（例如切断蓝宝石）上的基底主体的切削研磨或生长来对对应的原子块或晶片坯料进行切割切片来形成基底。 在制造III-V族氮化物微电子和光电子器件时，该衬底有效地用于同质外延沉积。

公开(公告)号：US07170095B2

公开(公告)日：2007-01-30

申请号：US10618024

申请日：2003-07-11

申请人： Robert P. Vaudo ,  Xueping Xu ,  George R. Brandes

发明人： Robert P. Vaudo ,  Xueping Xu ,  George R. Brandes

IPC分类号： H01L29/15 ,  H01L21/20 ,  C23C16/24

CPC分类号： H01L29/207 ,  H01L21/02425 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02581 ,  H01L21/0262 ,  H01L29/2003

摘要： Large-area, single crystal semi-insulating gallium nitride that is usefully employed to form substrates for fabricating GaN devices for electronic and/or optoelectronic applications. The large-area, semi-insulating gallium nitride is readily formed by doping the growing gallium nitride material during growth thereof with a deep acceptor dopant species, e.g., Mn, Fe, Co, Ni, Cu, etc., to compensate donor species in the gallium nitride, and impart semi-insulating character to the gallium nitride.

摘要翻译： 大面积的单晶半绝缘氮化镓，其有效地用于形成用于制造用于电子和/或光电应用的GaN器件的衬底。 大面积半绝缘氮化镓容易通过在其生长期间掺杂生长的氮化镓材料与深受主掺杂物质（例如Mn，Fe，Co，Ni，Cu等）来形成，以补偿在 氮化镓，并赋予氮化镓半绝缘特性。

公开(公告)号：US20110089536A1

公开(公告)日：2011-04-21

申请号：US12974332

申请日：2010-12-21

申请人： George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

发明人： George R. Brandes ,  Robert P. Vaudo ,  Xueping Xu

IPC分类号： H01L29/38

CPC分类号： H01S5/32341 ,  Y10S438/973

摘要： A microelectronic assembly in which a semiconductor device structure is directionally positioned on an off-axis substrate. In an illustrative implementation, a laser diode is oriented on a GaN substrate wherein the GaN substrate includes a GaN (0001) surface off-cut from the direction predominantly towards either the or the family of directions. For a off-cut substrate, a laser diode cavity may be oriented along the direction parallel to lattice surface steps of the substrate in order to have a cleaved laser facet that is orthogonal to the surface lattice steps. For a off-cut substrate, the laser diode cavity may be oriented along the direction orthogonal to lattice surface steps of the substrate in order to provide a cleaved laser facet that is aligned with the surface lattice steps.

摘要翻译： 一种微电子组件，其中半导体器件结构定向地定位在离轴衬底上。 在说明性实施方案中，激光二极管定向在GaN衬底上，其中GaN衬底包括从（0001）方向偏离的GaN（0001）表面，主要朝向<11 20>或<1100> 方向。 对于<11 20>截割衬底，激光二极管空腔可以沿着平行于衬底的晶格表面台阶的<100°方向取向，以便具有与表面晶格步骤正交的切割的激光刻面。 对于<100>切割衬底，激光二极管空腔可以沿着与衬底的晶格表面台阶正交的<100°方向取向，以便提供与表面晶格步骤对准的切割的激光刻面。

公开(公告)号：US20080199649A1

公开(公告)日：2008-08-21

申请号：US12102275

申请日：2008-04-14

申请人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

发明人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

IPC分类号： B32B3/02 ,  C01B21/00 ,  C01B21/06 ,  C01B21/072 ,  H01L31/00 ,  B32B9/00

CPC分类号： C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L29/045 ,  H01L29/2003 ,  Y10T83/0524 ,  Y10T428/31

摘要： A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the direction predominantly toward a direction selected from the group consisting of and directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 μm2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3E6 cm−2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

摘要翻译： III-V族氮化物，例如GaN，衬底，其包括从<0001>方向切除的（0001）表面主要朝向选自<10-10>和<11-20>方向的方向切割 在约0.2至约10度的范围内的角度，其中表面具有通过50×50μm2μmAFM扫描测量的RMS粗糙度小于1nm，位错密度小于 3E6厘米-2。 可以通过在对应的邻位异质外延基底（例如切断蓝宝石）上的基底主体的切削研磨或生长来对对应的原子块或晶片坯料进行切割切片来形成基底。 在制造III-V族氮化物微电子和光电子器件时，该衬底有效地用于同质外延沉积。

公开(公告)号：US08043731B2

公开(公告)日：2011-10-25

申请号：US12713514

申请日：2010-02-26

申请人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

发明人： Xueping Xu ,  Robert P. Vaudo ,  Jeffrey S. Flynn ,  George R. Brandes

IPC分类号： B32B18/00 ,  B32B11/08

CPC分类号： C30B29/403 ,  C30B25/18 ,  C30B29/406 ,  H01L29/045 ,  H01L29/2003 ,  Y10T83/0524 ,  Y10T428/31

摘要： A III-V nitride, e.g., GaN, substrate including a (0001) surface offcut from the direction predominantly toward a direction selected from the group consisting of and directions, at an offcut angle in a range that is from about 0.2 to about 10 degrees, wherein the surface has a RMS roughness measured by 50×50 μm2 AFM scan that is less than 1 nm, and a dislocation density that is less than 3 E6 cm−2. The substrate may be formed by offcut slicing of a corresponding boule or wafer blank, by offcut lapping or growth of the substrate body on a corresponding vicinal heteroepitaxial substrate, e.g., of offcut sapphire. Both upper and lower surfaces may be offcut. The substrate is usefully employed for homoepitaxial deposition in the fabrication of III-V nitride-based microelectronic and opto-electronic devices.

摘要翻译： III-V族氮化物，例如GaN，衬底，其包括从<0001>方向切除的（0001）表面主要朝向选自<10-10>和<11-20>方向的方向切割 在约0.2至约10度的范围内的角度，其中表面具有通过50×50μm2 AFM扫描测量的RMS粗糙度小于1nm，位错密度小于3E6cm-2。 可以通过在对应的邻位异质外延基底（例如切断蓝宝石）上的基底主体的切削研磨或生长来对对应的原子块或晶片坯料进行切割切片来形成基底。 上表面和下表面都可以被切断。 在制造III-V族氮化物微电子和光电子器件时，该衬底有效地用于同质外延沉积。