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公开(公告)号：US20100091662A1
公开(公告)日：2010-04-15
申请号：US12288035
申请日：2008-10-15
IPC分类号： H04J3/14
CPC分类号： H04J3/047 , H03K17/002 , H03K19/0021 , H03K19/003
摘要： Embodiments of the present invention include defect-tolerant demultiplexer crossbars that employ, or that can be modeled by demultiplexer crossbars that employ, threshold logic “TL” elements. The threshold-logic elements provide for tolerance for signal variation on internal signals lines of a defect-tolerant demultiplexer crossbar, and thus tolerance for defects which produce internal signal variation.
摘要翻译： 本发明的实施例包括采用阈值逻辑“TL”元素的采用或可以通过解复用器交叉开关建模的缺陷容许解复用器交叉开关。 阈值逻辑元件提供了对于容错解复用器交叉开关的内部信号线上的信号变化的容限，并因此提供产生内部信号变化的缺陷的容限。
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公开(公告)号：US07899091B2
公开(公告)日：2011-03-01
申请号：US12288035
申请日：2008-10-15
IPC分类号： H04J99/00
CPC分类号： H04J3/047 , H03K17/002 , H03K19/0021 , H03K19/003
摘要： Embodiments of the present invention include defect-tolerant demultiplexer crossbars that employ, or that can be modeled by demultiplexer crossbars that employ, threshold logic “TL” elements. The threshold-logic elements provide for tolerance for signal variation on internal signals lines of a defect-tolerant demultiplexer crossbar, and thus tolerance for defects which produce internal signal variation.
摘要翻译： 本发明的实施例包括采用阈值逻辑“TL”元素的采用或可以通过解复用器交叉开关建模的缺陷容许解复用器交叉开关。 阈值逻辑元件提供了对于容错解复用器交叉开关的内部信号线上的信号变化的容限，并因此提供产生内部信号变化的缺陷的容限。
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公开(公告)号：US20100094580A1
公开(公告)日：2010-04-15
申请号：US12288021
申请日：2008-10-15
IPC分类号： G01R31/00
CPC分类号： G01R31/317
摘要： Embodiments of the present invention are directed to cost-effective defect amelioration in manufactured electronic devices that include nanoscale components. Certain embodiments of the present invention are directed to amelioration of defects in electronic devices that contain nanoscale demultiplexers. In certain embodiments of the present invention, the nanoscale-demultiplexer-containing devices include reconfigurable encoders. In one embodiment of the present invention, the table of codes within a reconfigurable encoder is permuted, and a device is configured in accordance with the permuted codes, in order to produce a permuted table of codes that, when input to an appropriately configured nanoscale demultiplexer, produces correct outputs despite defects in the nanoscale demultiplexer.
摘要翻译： 本发明的实施例涉及在包括纳米级组件的制造的电子设备中的经济有效的缺陷改善。 本发明的某些实施例涉及改善包含纳米级解复用器的电子设备中的缺陷。 在本发明的某些实施例中，含纳米级解复用器的装置包括可重构编码器。 在本发明的一个实施例中，可重构编码器内的代码表被置换，并且根据置换代码配置器件，以便产生置换的代码表，当输入到适当配置的纳米级解复用器 ，尽管纳米级解复用器中存在缺陷，但仍能产生正确的输出。
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公开(公告)号：US08121807B2
公开(公告)日：2012-02-21
申请号：US12288021
申请日：2008-10-15
IPC分类号： G01R27/28
CPC分类号： G01R31/317
摘要： Embodiments of the present invention are directed to cost-effective defect amelioration in manufactured electronic devices that include nanoscale components. Certain embodiments of the present invention are directed to amelioration of defects in electronic devices that contain nanoscale demultiplexers. In certain embodiments of the present invention, the nanoscale-demultiplexer-containing devices include reconfigurable encoders. In one embodiment of the present invention, the table of codes within a reconfigurable encoder is permuted, and a device is configured in accordance with the permuted codes, in order to produce a permuted table of codes that, when input to an appropriately configured nanoscale demultiplexer, produces correct outputs despite defects in the nanoscale demultiplexer.
摘要翻译： 本发明的实施例涉及在包括纳米级组件的制造的电子设备中的经济有效的缺陷改善。 本发明的某些实施例涉及改善包含纳米级解复用器的电子设备中的缺陷。 在本发明的某些实施例中，含纳米级解复用器的装置包括可重构编码器。 在本发明的一个实施例中，可重构编码器内的代码表被置换，并且根据置换代码配置器件，以便产生置换的代码表，当输入到适当配置的纳米级解复用器 ，尽管纳米级解复用器中存在缺陷，但仍能产生正确的输出。
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5.发明授权Constant-weight-code-based addressing of nanoscale and mixed microscale/nanoscale arrays 有权纳米尺度和混合微米级/纳米尺寸阵列的基于恒权重代码的寻址公开(公告)号：US07489583B2
公开(公告)日：2009-02-10
申请号：US11221036
申请日：2005-09-06
申请人： Philip J. Kuekes , J. Warren Roblnett , Ron M. Roth , Gadlel Seroussl , Gregory S. Smider , R. Stanley Williams
发明人： Philip J. Kuekes , J. Warren Roblnett , Ron M. Roth , Gadlel Seroussl , Gregory S. Smider , R. Stanley Williams
IPC分类号： G11C8/00
CPC分类号： G11C8/10 , B82Y10/00 , G11C13/00 , G11C13/0023 , G11C13/0069 , G11C2013/009 , G11C2213/77 , G11C2213/81
摘要： Various embodiments of the present invention include methods for determining nanowire addressing schemes and include microscale/nanoscale electronic devices that incorporate the nanowire addressing schemes for reliably addressing nanowire-junctions within nanowire crossbars. The addressing schemes allow for change in the resistance state, or other physical or electronic state, of a selected nanowire-crossbar junction without changing the resistance state, or other physical or electronic state, of the remaining nanowire-crossbar junctions, and without destruction of either the selected nanowire-crossbar junction or the remaining, non-selected nanowire-crossbar junctions. Additional embodiments of the present invention include nanoscale memory arrays and other nanoscale electronic devices that incorporate the nanowire-addressing-scheme embodiments of the present invention. Certain of the embodiments of the present invention employ constant-weight codes, a well-known class of error-control-encoding codes, as addressed-nanowire selection voltages applied to microscale output signal lines of microscale/nanoscale encoder-demultiplexers that are selectively interconnected with a set of nanowires.
摘要翻译： 本发明的各种实施例包括用于确定纳米线寻址方案的方法，并且包括微纳米级纳米级电子器件，其纳入用于在纳米线交叉管内可靠地寻址纳米线结的纳米线寻址方案。 寻址方案允许选择的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态的改变，而不改变剩余的纳米线 - 交叉连接点的电阻状态或其他物理或电子状态，并且不破坏 选择的纳米线 - 交叉结或剩余的未选择的纳米线交叉点结。 本发明的另外的实施例包括结合本发明的纳米线寻址方案实施例的纳米级存储器阵列和其它纳米级电子器件。 本发明的某些实施例采用常规权重代码，众所周知的错误控制编码代码，作为施加到微尺度/纳米级编码器 - 解复用器的微量输出信号线上的寻址纳米线选择电压，其被选择性地互连 与一套纳米线。
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公开(公告)号：US08502198B2
公开(公告)日：2013-08-06
申请号：US11414578
申请日：2006-04-28
IPC分类号： H01L29/08
CPC分类号： G11C13/02 , G11C13/0009 , G11C2213/77 , H01L51/0591
摘要： A switching device includes at least one bottom electrode and at least one top electrode. The top electrode crosses the bottom electrode at a non-zero angle, thereby forming a junction. A metal oxide layer is established on at least one of the bottom electrode or the top electrode. A molecular layer including a monolayer of organic molecules and a source of water molecules is established in the junction. Upon introduction of a forward bias, the molecular layer facilitates a redox reaction between the electrodes, thereby reducing a tunneling gap between the electrodes.
摘要翻译： 开关装置包括至少一个底部电极和至少一个顶部电极。 顶部电极以非零角度穿过底部电极，从而形成结。 在底电极或顶电极中的至少一个上建立金属氧化物层。 在连接处建立了包括有机分子单层和水分子源的分子层。 在引入正向偏压时，分子层促进电极之间的氧化还原反应，从而减少电极之间的隧道间隙。
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7.发明授权Scalable, component-accessible, and highly interconnected three-dimensional component arrangement within a system 有权系统内可扩展的，可组件访问的和高度互连的三维组件布置公开(公告)号：US08214786B2
公开(公告)日：2012-07-03
申请号：US10935845
申请日：2004-09-08
IPC分类号： G06F17/50
CPC分类号： G06F1/18 , G06F17/509 , H05K7/1444
摘要： Embodiments of the present invention include dense, but accessible and well-interconnected component arrangements within multi-component systems, such as high-end multi-processor computer systems, and methods for constructing such arrangements. In a described embodiment, integrated-circuit-containing processing components, referred to as a “flat components,” are arranged into local blocks of intercommunicating flat components. The local flat-component blocks are arranged into interconnected, primitive multi-local-block repeating units, and the primitive local-block repeating units are layered together in a three-dimensional, regularly repeating structure that can be assembled to approximately fill any specified three-dimensional volume. The arrangement provides for relatively short, direct pathways from the surface of the specified volume to any particular local block and flat component within the three-dimensional arrangement.
摘要翻译： 本发明的实施例包括在诸如高端多处理器计算机系统的多组件系统内的密集但可访问和良好互连的组件布置，以及用于构造这种布置的方法。 在所描述的实施例中，被称为“平面部件”的集成电路的处理部件被布置在相互连通的平面部件的局部块中。 本地平面组件块被布置成互连的原始多局部块重复单元，并且原始局部块重复单元以三维的规则重复的结构分层在一起，其可以被组装以大致填充任何指定的三 维数。 该装置提供从指定体积的表面到三维布置中的任何特定局部块和平坦部件的相对短的直接通路。
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8.发明授权Defect-and-failure-tolerant demultiplexer using series replication and error-control encoding 有权使用序列复制和错误控制编码的缺陷和容错解复用器公开(公告)号：US07872502B2
公开(公告)日：2011-01-18
申请号：US11484961
申请日：2006-07-12
IPC分类号： H03K19/094
CPC分类号： H03K19/007 , G06F11/1076 , H03K19/00315
摘要： One embodiment of the present invention is a method for constructing defect-and-failure-tolerant demultiplexers. This method is applicable to nanoscale, microscale, or larger-scale demultiplexer circuits. Demultiplexer circuits can be viewed as a set of AND gates, each including a reversibly switchable interconnection between a number of address lines, or address-line-derived signal lines, and an output signal line. Each reversibly switchable interconnection includes one or more reversibly switchable elements. In certain demultiplexer embodiments, NMOS and/or PMOS transistors are employed as reversibly switchable elements. In the method that represents one embodiment of the present invention, two or more serially connected transistors are employed in each reversibly switchable interconnection, so that short defects in up to one less than the number of serially interconnected transistors does not lead to failure of the reversibly switchable interconnection. In addition, error-control-encoding techniques are used to introduce additional address-line-derived signal lines and additional switchable interconnections so that the demultiplexer may function even when a number of individual, switchable interconnections are open-defective.
摘要翻译： 本发明的一个实施例是一种用于构建缺陷和容错解复用器的方法。 该方法适用于纳米尺度，微米级或更大规模的解复用器电路。 解复用器电路可以被视为一组与门，每个与门包括多个地址线或地址线导出的信号线之间的可逆切换互连以及输出信号线。 每个可逆切换互连包括一个或多个可逆切换元件。 在某些解复用器实施例中，NMOS和/或PMOS晶体管被用作可逆切换元件。 在表示本发明的一个实施例的方法中，在每个可逆切换互连中使用两个或更多个串联连接的晶体管，使得比串联互连晶体管的数量少一个的短缺陷不会导致可逆地失效 可切换互连。 此外，误差控制编码技术用于引入附加的地址线导出的信号线和附加的可切换互连，使得即使当多个单独的可切换互连是开放缺陷时，解复用器也可以起作用。
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公开(公告)号：US20100293518A1
公开(公告)日：2010-11-18
申请号：US12011175
申请日：2008-01-23
IPC分类号： G06F17/50
CPC分类号： G11C13/0023 , B82Y10/00 , G06F11/1016 , G11C8/10 , G11C11/54 , G11C13/0002 , G11C2213/77 , G11C2213/81
摘要： One embodiment of the present invention provides a demultiplexer implemented as a nanowire crossbar or a hybrid nanowire/microscale-signal-line crossbar with resistor-like nanowire junctions. The demultiplexer of one embodiment provides demultiplexing of signals input on k microscale address lines to 2k or fewer nanowires, employing supplemental, internal address lines to map 2k nanowire addresses to a larger, internal, n-bit address space, where n>k. A second demultiplexer embodiment of the present invention provides demultiplexing of signals input on n microscale address lines to 2k nanowires, with n>k, using 2k, well-distributed, n-bit external addresses to access the 2k nanowires. Additional embodiments of the present invention include a method for evaluating different mappings of nanowire addresses to internal address-spaces of different sizes, or to evaluate mappings of nanowires to external address-spaces of different sizes, metrics for evaluating address mapping and demultiplexer designs, and demultiplexer design methods.
摘要翻译： 本发明的一个实施例提供了一种解复用器，其实现为纳米线交叉开关或具有电阻器状纳米线结的混合纳米线/微型信号线交叉开关。 一个实施例的解复用器提供在k个微米地址线上输入的信号到2k个或更少的纳米线的解复用，采用补充的内部地址线将2k个纳米线地址映射到更大的内部n位地址空间，其中n> k。 本发明的第二解复用器实施例使用2k，均匀分布的n位外部地址来访问2k纳米线，在n个微米级地址线上输入的信号到2k纳米线解复用n> k。 本发明的另外的实施例包括用于评估纳米线地址与不同大小的内部地址空间的不同映射的方法，或者评估纳米线与不同大小的外部地址空间的映射，用于评估地址映射和解复用器设计的度量，以及 解复用器设计方法。
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公开(公告)号：US07388200B2
公开(公告)日：2008-06-17
申请号：US11583262
申请日：2006-10-19
申请人： Duncan R. Stewart , William M. Tong , R. Stanley Williams , Philip J. Kuekes , Sean Xiao-an Zhang , Kevin F. Peters , Kenneth J. Ward
发明人： Duncan R. Stewart , William M. Tong , R. Stanley Williams , Philip J. Kuekes , Sean Xiao-an Zhang , Kevin F. Peters , Kenneth J. Ward
CPC分类号： G01N27/128 , Y10S977/762 , Y10S977/957
摘要： A sensing method includes exposing a nano-transducer having a controlled surface to a sample including at least one species. Adsorption of the species on the nano-transducer is transduced to a measurable signal as a function of time. Desorption of the species from the nano-transducer is also transduced to a measurable signal as a function of time. A residence time of the at least one species adsorbed on the nano-transducer is extracted from the measurable signals. The adsorption and desorption each define an individual measurable event.
摘要翻译： 感测方法包括将具有受控表面的纳米换能器暴露于包括至少一种的样品。 物种在纳米转换器上的吸附作为时间的函数被转导到可测量的信号。 物种从纳米转换器的解吸也被转换为可测量的信号作为时间的函数。 从可测量信号中提取吸附在纳米换能器上的至少一种物质的停留时间。 吸附和解吸各自定义一个单独的可测量事件。
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