摘要:
A microcavity structure is provided. The structure comprises a cavity layout that enables centering of reflowed solder at each of one or more interconnect locations and protrusion of the reflowed solder sufficiently from the cavity to facilitate wetting. Techniques are also provided for producing a microcavity structure, for using injection molded solder (IMS) for micro bumping, as well as for using injection molded solder (IMS) for three-dimensional (3D) packaging.
摘要:
A microcavity structure is provided. The structure comprises a cavity layout that enables centering of reflowed solder at each of one or more interconnect locations and protrusion of the reflowed solder sufficiently from the cavity to facilitate wetting. Techniques are also provided for producing a microcavity structure, for using injection molded solder (IMS) for micro bumping, as well as for using injection molded solder (IMS) for three-dimensional (3D) packaging.
摘要:
A system and method for preventing cracks is provided. An embodiment comprises placing crack stoppers into a connection between a semiconductor die and a substrate. The crack stoppers may be in the shape of hollow or solid cylinders and may be placed so as to prevent any cracks from propagating through the crack stoppers.
摘要:
An electrical structure including a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要:
A multi-chip wafer level package comprises three stacked semiconductor dies. A first semiconductor die is embedded in a first photo-sensitive material layer. A second semiconductor die is stacked on top of the first semiconductor die wherein the second semiconductor die is face-to-face coupled to the first semiconductor die. A third semiconductor die is back-to-back attached to the second semiconductor die. Both the second semiconductor die and the third semiconductor die are embedded in a second photo-sensitive material layer. The multi-chip wafer level package further comprises a plurality of through assembly vias formed in the first photo-sensitive material layer and the second photo-sensitive material layer.
摘要:
An electrical interconnect forming method. The electrical interconnect includes a first substrate comprising a first electrically conductive pad, a second substrate comprising a second electrically conductive pad, and an interconnect structure electrically and mechanically connecting the first electrically conductive pad to the second electrically conductive pad. The interconnect structure comprises a non-solder metallic core structure, a first solder structure, and a second solder structure. The first solder structure electrically and mechanically connects a first portion of the non-solder metallic core structure to the first electrically conductive pad. The second solder structure electrically and mechanically connects a second portion of the non-solder metallic core structure to the second electrically conductive pad.
摘要:
The present invention is hybrid liquid metal-solder thermal interface. In one embodiment, a thermal interface for coupling a heat generating device to a heat sink includes a first metal interface layer, a second metal interface layer, and an isolation layer positioned between the first metal interface layer and the second metal interface layer, where at least one of the first metal interface layer and the second metal interface layer comprises a liquid metal.
摘要:
A process comprises manufacturing an electromigration-resistant under-bump metallization (UBM) flip chip structure comprising a Cu layer by applying to the Cu layer a metallic reaction barrier layer comprising NiFe. The solder employed in the flip chip structure comprise substantially lead-free tin. A structure comprises a product produced by this process. In another embodiment a process comprises manufacturing an electromigration-resistant UBM Sn-rich Pb-free solder bump flip chip structure wherein the electromigration-resistant UBM structure comprises a four-layer structure, or a three-layer structure, wherein the four layer structure is formed by providing 1) an adhesion layer, 2) a Cu seed layer for plating, 3) a reaction barrier layer, and 4) a wettable layer for joining to the solder, and the three-layer structure is formed by providing 1) an adhesion layer, 2) a reaction barrier layer, and 3) a wettable layer. In a further embodiment, the reaction barrier layer comprises metals selected from Ni, Fe, Pd, Pt, Co, Cu and their alloys, and combinations thereof. A structure comprises a product produced by the immediately foregoing process.
摘要:
A process for aligning at least two layers in an abutting relationship with each other comprises forming a plurality of sprocket openings in each of the layers for receiving a sprocket of diminishing diameters as the sprocket extends outwardly from a base, with the center axes of the sprocket openings in each layer being substantially alignable with one another, the diameter of the sprocket openings in an abutting layer for first receiving the sprocket being greater than the diameter of the sprocket openings in an abutted layer. This is followed by forming a plurality of reservoir openings in each of at least two of the layers and positioning the sprocket openings in the layers to correspond with one another and the reservoir openings in the layers to correspond with one another so that substantial alignment of the center axes of the corresponding sprocket openings in the layers effects substantial alignment of the center axes of the corresponding reservoir openings in the layers. Engaging the sprocket openings with the sprocket by inserting the end of the sprocket having the smallest diameter into the sprocket openings having the largest diameter in the layers and continuing through to the sprocket opening having the smallest diameter in the layers effects substantial alignment of the center axes of the corresponding sprocket openings and substantial alignment of the center axes of the corresponding reservoir openings in the layers. The invention also comprises apparatus-for performing this process.
摘要:
An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.