Nonvolatile memory device containing carbon or nitrogen doped diode
    1.
    发明申请
    Nonvolatile memory device containing carbon or nitrogen doped diode 失效
    包含碳或氮掺杂二极管的非易失性存储器件

    公开(公告)号:US20080316808A1

    公开(公告)日:2008-12-25

    申请号:US11819042

    申请日:2007-06-25

    IPC分类号: G11C11/00

    CPC分类号: G11C11/36

    摘要: A nonvolatile memory device includes at least one nonvolatile memory cell which comprises a silicon, germanium or silicon-germanium diode which is doped with at least one of carbon or nitrogen in a concentration greater than an unavoidable impurity level concentration.

    摘要翻译: 非易失性存储器件包括至少一个非易失性存储单元,其包括硅,锗或硅 - 锗二极管,其掺杂有浓度大于不可避免的杂质水平浓度的碳或氮中的至少一种。

    Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
    2.
    发明授权
    Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride 有权
    异质结装置包括半导体和电阻率切换氧化物或氮化物

    公开(公告)号:US08227787B2

    公开(公告)日:2012-07-24

    申请号:US13007812

    申请日:2011-01-17

    IPC分类号: H01L29/02 H01L47/00

    摘要: In the present invention, a metal oxide or nitride compound which is a wide-band-gap semiconductor abuts a silicon, germanium, or alloy of silicon and/or germanium of the opposite conductivity type to form a p-n heterojunction. This p-n heterojunction can be used to advantage in various devices. In preferred embodiments, one terminal of a vertically oriented p-i-n heterojunction diode is a metal oxide or nitride layer, while the rest of the diode is formed of a silicon or silicon-germanium resistor. For example, a diode may include a heavily doped n-type silicon region, an intrinsic silicon region, and a nickel oxide layer serving as the p-type terminal. Many of these metal oxides and nitrides exhibit resistivity-switching behavior, and such a heterojunction diode can be used in a nonvolatile memory cell, for example in a monolithic three dimensional memory array.

    摘要翻译: 在本发明中,作为宽带隙半导体的金属氧化物或氮化物化合物与相反导电型的硅和/或锗的硅,锗或合金相接触以形成p-n异质结。 该p-n异质结可以用于各种装置中。 在优选实施例中,垂直取向的p-i-n异质结二极管的一个端子是金属氧化物或氮化物层,而二极管的其余部分由硅或硅 - 锗电阻器形成。 例如,二极管可以包括重掺杂的n型硅区,本征硅区和用作p型端的氧化镍层。 这些金属氧化物和氮化物中的许多表现出电阻率切换行为,并且这种异质结二极管可以用在非易失性存储单元中,例如在单片三维存储器阵列中。

    Memory cell comprising switchable semiconductor memory element with trimmable resistance
    4.
    发明授权
    Memory cell comprising switchable semiconductor memory element with trimmable resistance 有权
    存储单元包括具有可调整电阻的可切换半导体存储元件

    公开(公告)号:US07800932B2

    公开(公告)日:2010-09-21

    申请号:US11237167

    申请日:2005-09-28

    IPC分类号: G11C11/00 G11C11/14 G11C11/15

    摘要: A nonvolatile memory cell comprising doped semiconductor material and a diode can store memory states by changing the resistance of the doped semiconductor material by application of a set pulse (decreasing resistance) or a reset pulse (increasing resistance.) Set pulses are of short duration and above a threshold voltage, while reset pulses are longer duration and below a threshold voltage. In some embodiments multiple resistance states can be achieved, allowing for a multi-state cell, while restoring a prior high-resistance state allows for an rewriteable cell. In some embodiments, the diode and a switchable memory formed of doped semiconductor material are formed in series, while in other embodiments, the diode itself serves as the semiconductor switchable memory element.

    摘要翻译: 包括掺杂半导体材料和二极管的非易失性存储单元可以通过施加设置脉冲(降低电阻)或复位脉冲(增加电阻)来改变掺杂半导体材料的电阻来存储存储器状态。设置脉冲的持续时间短, 高于阈值电压,而复位脉冲的持续时间更长并低于阈值电压。 在一些实施例中,可以实现多个电阻状态,允许多状态单元,同时恢复先前的高电阻状态允许可重写单元。 在一些实施例中,二极管和由掺杂半导体材料形成的可切换存储器是串联形成的,而在其它实施例中,二极管本身用作半导体可切换存储元件。

    VERTICAL DIODE BASED MEMORY CELLS HAVING A LOWERED PROGRAMMING VOLTAGE AND METHODS OF FORMING THE SAME
    6.
    发明申请
    VERTICAL DIODE BASED MEMORY CELLS HAVING A LOWERED PROGRAMMING VOLTAGE AND METHODS OF FORMING THE SAME 有权
    具有降低的编程电压的基于垂直二极管的存储器电池及其形成方法

    公开(公告)号:US20090085154A1

    公开(公告)日:2009-04-02

    申请号:US11864848

    申请日:2007-09-28

    IPC分类号: H01L27/102 H01L21/8229

    摘要: In a first aspect, a method for forming a non-volatile memory cell is provided. The method includes (1) forming a metal-insulator-metal (MIM) antifuse stack including (a) a first metal layer; (b) a silicon dioxide, oxynitride or silicon nitride antifuse layer formed above the first metal layer; and (c) a second metal layer formed above the antifuse layer. The method also includes (2) forming a contiguous p-i-n diode above the MIM stack, the contiguous p-i-n diode comprising deposited semiconductor material; (3) forming a layer of a silicide, silicide-germanide, or germanide in contact with the deposited semiconductor material; and (4) crystallizing the deposited semiconductor material in contact with the layer of silicide, silicide-germanide, or germanide. The memory cell comprises the contiguous p-i-n diode and the MIM stack. Other aspects are provided.

    摘要翻译: 在第一方面,提供了一种用于形成非易失性存储单元的方法。 该方法包括(1)形成包括(a)第一金属层的金属 - 绝缘体 - 金属(MIM)反熔丝堆叠; (b)形成在第一金属层上方的二氧化硅,氧氮化物或氮化硅反熔层; 和(c)形成在反熔丝层之上的第二金属层。 该方法还包括(2)在MIM堆叠之上形成连续的p-i-n二极管,连续的p-i-n二极管包括沉积的半导体材料; (3)形成与沉积的半导体材料接触的硅化物层,硅化锗 - 锗化物或锗化物层; 和(4)使沉积的半导体材料与硅化物,硅化锗 - 锗化物或锗化物层接触。 存储单元包括相邻的p-i-n二极管和MIM堆叠。 提供其他方面。

    Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride
    10.
    发明授权
    Heterojunction device comprising a semiconductor and a resistivity-switching oxide or nitride 有权
    异质结装置包括半导体和电阻率切换氧化物或氮化物

    公开(公告)号:US07875871B2

    公开(公告)日:2011-01-25

    申请号:US11395419

    申请日:2006-03-31

    IPC分类号: H04L29/02 H04L47/00

    摘要: In the present invention a metal oxide or nitride compound which is a wide-band-gap semiconductor abuts a silicon, germanium, or alloy of silicon and/or germanium of the opposite conductivity type to form a p-n heterojunction. This p-n heterojunction can be used to advantage in various devices. In preferred embodiments, one terminal of a vertically oriented p-i-n heterojunction diode is a metal oxide or nitride layer, while the rest of the diode is formed of a silicon or silicon-germanium resistor; for example a diode may include a heavily doped n-type silicon region, an intrinsic silicon region, and a nickel oxide layer serving as the p-type terminal. Many of these metal oxides and nitrides exhibit resistivity-switching behavior, and such a heterojunction diode can be used in a nonvolatile memory cell, for example in a monolithic three dimensional memory array.

    摘要翻译: 在本发明中,作为宽带隙半导体的金属氧化物或氮化物化合物与相反导电型的硅和/或锗的硅,锗或合金相接触以形成p-n异质结。 该p-n异质结可以用于各种装置中。 在优选实施例中,垂直取向的p-i-n异质结二极管的一个端子是金属氧化物或氮化物层,而二极管的其余部分由硅或硅 - 锗电阻器形成; 例如二极管可以包括重掺杂的n型硅区,本征硅区和用作p型端的氧化镍层。 这些金属氧化物和氮化物中的许多表现出电阻率切换行为,并且这种异质结二极管可以用在非易失性存储单元中,例如在单片三维存储器阵列中。