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公开(公告)号：US09768309B2
公开(公告)日：2017-09-19
申请号：US15194841
申请日：2016-06-28
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L27/00 , H01L29/00 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417 , H01L27/32
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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2.发明授权Thin film transistor, thin film transistor array panel including the same, and method of manufacturing the same 有权薄膜晶体管，包括其的薄膜晶体管阵列面板及其制造方法公开(公告)号：US09034691B2
公开(公告)日：2015-05-19
申请号：US14468472
申请日：2014-08-26
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang
IPC分类号： H01L21/02 , H01L29/66 , H01L27/12 , H01L29/786 , H01L21/385 , H01L21/441
CPC分类号： H01L29/7869 , H01L21/0262 , H01L21/385 , H01L21/441 , H01L27/1214 , H01L27/1225 , H01L27/1259 , H01L27/1288 , H01L29/41733 , H01L29/66969 , H01L29/786 , H01L29/78633 , H01L29/78696
摘要： A thin film transistor, a thin film transistor array panel including the same, and a method of manufacturing the same are provided, wherein the thin film transistor includes a channel region including an oxide semiconductor, a source region and a drain region connected to the channel region and facing each other at both sides with respect to the channel region, an insulating layer positioned on the channel region, and a gate electrode positioned on the insulating layer, wherein an edge boundary of the gate electrode and an edge boundary of the channel region are substantially aligned.
摘要翻译： 提供一种薄膜晶体管，包括该薄膜晶体管的薄膜晶体管阵列面板及其制造方法，其中薄膜晶体管包括沟道区，该沟道区包括氧化物半导体，源极区和连接到沟道的漏极区 区域，并且相对于沟道区域在两侧面对，位于沟道区域上的绝缘层和位于绝缘层上的栅电极，其中栅电极的边缘边界和沟道区域的边缘边界 基本对齐。
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3.发明申请THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME 有权薄膜晶体管，包括其的薄膜晶体管阵列面板及其制造方法公开(公告)号：US20140167040A1
公开(公告)日：2014-06-19
申请号：US14184361
申请日：2014-02-19
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L29/786 , H01L29/66
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
摘要翻译： 根据本发明的示例性实施例的薄膜晶体管包括氧化物半导体。 源电极和漏电极彼此面对。 源电极和漏电极分别位于氧化物半导体的两个相对侧。 低导电区域位于源电极或漏电极与氧化物半导体之间。 绝缘层位于氧化物半导体和低导电区域上。 栅电极位于绝缘层上。 绝缘层覆盖氧化物半导体和低导电区域。 低导电区域的载流子浓度低于源电极或漏电极的载流子浓度。
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公开(公告)号：US12087865B2
公开(公告)日：2024-09-10
申请号：US18176454
申请日：2023-02-28
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L27/12 , H01L29/417 , H01L29/66 , H01L29/786 , H10K59/121
CPC分类号： H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696 , H10K59/1213
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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公开(公告)号：US09147741B2
公开(公告)日：2015-09-29
申请号：US13892574
申请日：2013-05-13
发明人： Hyun Jae Na , Yoon Ho Khang , Sang Ho Park , Dong Hwan Shim , Se Hwan Yu , Yong Su Lee , Myoung Geun Cha
IPC分类号： H01L21/84 , H01L21/20 , H01L29/49 , H01L29/786
CPC分类号： H01L29/4908 , H01L29/518 , H01L29/78603 , H01L29/78633
摘要： A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.
摘要翻译： 根据本发明的示例性实施例的薄膜晶体管显示面板包括基板，形成在基板上的第一绝缘层，形成在第一绝缘层上的半导体层，形成在半导体层上的第二绝缘层，以及 形成在第二绝缘层上的栅电极，其中第一绝缘层包括遮光材料，第一绝缘层的厚度大于或等于第二绝缘层的厚度。
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公开(公告)号：US11594639B2
公开(公告)日：2023-02-28
申请号：US17115470
申请日：2020-12-08
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gap Kim , Yu-Gwang Jeong
IPC分类号： H01L27/00 , H01L29/00 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417 , H01L27/32
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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公开(公告)号：US09620609B2
公开(公告)日：2017-04-11
申请号：US14830091
申请日：2015-08-19
发明人： Hyun Jae Na , Yoon Ho Khang , Sang Ho Park , Dong Hwan Shim , Se Hwan Yu , Yong Su Lee , Myoung Geun Cha
IPC分类号： H01L29/786 , H01L27/12 , H01L29/49 , H01L29/51 , H01L33/34
CPC分类号： H01L29/4908 , H01L29/518 , H01L29/78603 , H01L29/78633
摘要： A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.
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公开(公告)号：US10861978B2
公开(公告)日：2020-12-08
申请号：US16231781
申请日：2018-12-24
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L27/00 , H01L29/00 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417 , H01L27/32
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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9.发明申请公开(公告)号：US20190312147A1
公开(公告)日：2019-10-10
申请号：US16231781
申请日：2018-12-24
发明人： Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC分类号： H01L29/786 , H01L27/12 , H01L29/417 , H01L29/66
摘要： A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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公开(公告)号：US09263467B2
公开(公告)日：2016-02-16
申请号：US14466665
申请日：2014-08-22
发明人： Sang Ho Park , Yoon Ho Khang , Se Hwan Yu , Yong Su Lee , Chong Sup Chang , Myoung Geun Cha , Hyun Jae Na
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20 , H01L27/12 , H01L29/786 , H01L29/417 , H01L29/45
CPC分类号： H01L27/124 , H01L27/1214 , H01L29/41758 , H01L29/458 , H01L29/78642 , H01L29/78669 , H01L29/78678
摘要： A thin film transistor array panel according to an exemplary embodiment of the present disclosure includes: an insulating substrate; a gate electrode disposed on the insulating substrate; a gate insulating layer disposed on the gate electrode; a semiconductor disposed on the gate insulating layer; a source electrode and a drain electrode disposed on the semiconductor; an ohmic contact layer disposed at an interface between at least one of the source and drain electrodes and the semiconductor. Surface heights of the source and drain electrodes different, while surface heights of the semiconductor and the ohmic contact layer are the same. The ohmic contact layer is made of a silicide of a metal used for the source and drain electrodes.
摘要翻译： 根据本公开的示例性实施例的薄膜晶体管阵列面板包括：绝缘基板; 设置在所述绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 设置在所述栅极绝缘层上的半导体; 设置在半导体上的源电极和漏电极; 欧姆接触层设置在源电极和漏电极中的至少一个与半导体之间的界面处。 源极和漏极的表面高度不同，而半导体和欧姆接触层的表面高度相同。 欧姆接触层由用于源极和漏极的金属的硅化物制成。
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