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公开(公告)号：US20150311334A1
公开(公告)日：2015-10-29
申请号：US14331587
申请日：2014-07-15
发明人： Chang Su JANG , Ji Hye KIM , Kyu Hyun MO , Dong Soo SEO , Sun Jae YOUN
CPC分类号： H01L29/1045 , H01L29/0607 , H01L29/7802 , H01L29/8611
摘要： A semiconductor device may include a drift layer having a first conductivity-type; a body region having a second conductivity-type and disposed on the drift layer; first semiconductor regions having the second conductivity-type and disposed to be spaced apart from each other below the drift layer; and second semiconductor regions having the first conductivity-type and disposed between the first semiconductor regions below the drift layer.
摘要翻译： 半导体器件可以包括具有第一导电类型的漂移层; 具有第二导电类型且设置在所述漂移层上的体区; 具有第二导电类型并且设置成在漂移层下方彼此间隔开的第一半导体区域; 以及具有第一导电类型并且设置在漂移层下方的第一半导体区域之间的第二半导体区域。
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公开(公告)号：US20150187919A1
公开(公告)日：2015-07-02
申请号：US14221972
申请日：2014-03-21
发明人： In Hyuk SONG , Dong Soo SEO , Kyu Hyun MO , Chang Su JANG , Jae Hoon PARK
IPC分类号： H01L29/739 , H01L29/06
CPC分类号： H01L29/7397 , H01L29/0696 , H01L29/0865 , H01L29/0878 , H01L29/1095 , H01L29/74 , H01L29/7813
摘要： A provided a power semiconductor device may include: a first semiconductor region of a first conductive type; a second semiconductor region of a second conductive type formed on the first semiconductor region; a plurality of trench gates formed to penetrate through the second semiconductor region and lengthily formed in one direction; and a third semiconductor region of the first conductive type formed on the second semiconductor region, formed at least partially in a length direction between the plurality of trench gates, and formed to contact one side of an adjacent trench gate in a width direction.
摘要翻译： 提供功率半导体器件的A可以包括：第一导电类型的第一半导体区域; 形成在第一半导体区域上的第二导电类型的第二半导体区域; 多个沟槽栅极，形成为穿过所述第二半导体区域并且沿一个方向长时间地形成; 以及第一导电类型的第三半导体区域，形成在所述第二半导体区域上，至少部分地在所述多个沟槽栅极之间的长度方向上形成，并且形成为在宽度方向上接触相邻沟槽栅极的一侧。
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公开(公告)号：US20150144992A1
公开(公告)日：2015-05-28
申请号：US14280464
申请日：2014-05-16
发明人： Chang Su JANG , In Hyuk Song , Jae Hoon Park , Dong Soo Seo
CPC分类号： H01L29/73 , H01L29/0615 , H01L29/0878 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要： A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; an termination region formed in the vicinity of the active region; a plurality of trenches formed in a length direction of the active region; a first conductivity type hole accumulating region formed below the channel in the active region; and a first conductivity type electric field limiting region formed in the termination region. The electric field limiting region is formed so as to at least partially cover a trench positioned at a boundary between the active region and the termination region.
摘要翻译： 功率半导体器件可以包括：在功率半导体器件的导通操作时具有流过其中形成的沟道的电流的有源区; 形成在有源区附近的端接区域; 在所述有源区的长度方向上形成的多个沟槽; 在所述有源区中形成在所述沟道下方的第一导电型孔积存区; 以及形成在终端区域中的第一导电型电场限制区域。 电场限制区域形成为至少部分地覆盖位于有源区域和端接区域之间的边界处的沟槽。
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公开(公告)号：US20140175612A1
公开(公告)日：2014-06-26
申请号：US13795414
申请日：2013-03-12
发明人： Chang Su JANG
IPC分类号： H01L29/06
CPC分类号： H01L29/0638 , H01L29/0619 , H01L29/0688 , H01L29/66136 , H01L29/8611
摘要： There are provided a semiconductor device and a method of manufacturing the same. The semiconductor device includes a body layer of a first conductivity type; an active layer of a second conductivity type, contacting an upper portion of the body layer; and a field limiting ring of a first conductivity type, formed in an upper portion of the active layer.
摘要翻译： 提供了一种半导体器件及其制造方法。 半导体器件包括第一导电类型的体层; 第二导电类型的有源层，与主体层的上部接触; 以及形成在有源层的上部的第一导电类型的场限制环。
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公开(公告)号：US20160005842A1
公开(公告)日：2016-01-07
申请号：US14495887
申请日：2014-09-25
发明人： Jae Hoon PARK , Chang Su JANG , Kyu Hyun MO , In Hyuk SONG
IPC分类号： H01L29/739 , H01L29/66
CPC分类号： H01L29/66348 , H01L21/02639 , H01L21/02647 , H01L21/7621 , H01L29/0649 , H01L29/7397
摘要： A power semiconductor device may include a drift region including a base layer and a surface semiconductor layer disposed on the base layer and having a first conductivity type; a field insulating layer disposed on the base layer, embedded in the surface semiconductor layer, and including an opening portion; and a collector region disposed below the base layer and having a second conductivity type. The field insulating layer is formed in the drift region to limit movement of holes, whereby conduction loss of the power semiconductor device may be significantly decreased.
摘要翻译： 功率半导体器件可以包括漂移区，包括基底层和设置在基底层上并具有第一导电类型的表面半导体层; 设置在所述基底层上的场绝缘层，嵌入在所述表面半导体层中，并且包括开口部; 以及设置在所述基底层下方并具有第二导电类型的集电极区域。 在漂移区域中形成场绝缘层以限制空穴的移动，从而可以显着降低功率半导体器件的导通损耗。
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公开(公告)号：US20150364585A1
公开(公告)日：2015-12-17
申请号：US14470355
申请日：2014-08-27
发明人： In Hyuk SONG , Dong Soo SEO , Ji Hye KIM , Chang Su JANG , Jae Hoon PARK
IPC分类号： H01L29/739 , H01L29/08 , H01L29/417 , H01L29/10
CPC分类号： H01L29/0619 , H01L29/0696 , H01L29/1095 , H01L29/7397
摘要： A power semiconductor device may include: an n-drift part; a gate disposed in an upper portion of the n-drift part; an active part disposed to be in contact with the gate; an emitter part disposed in the active part and disposed to be in contact with the gate; an inactive part disposed to be spaced apart from the active part; a floating part disposed in the inactive part; and a dummy gate disposed to surround the inactive part in order to prevent a hole pass between the active part and the inactive part.
摘要翻译： 功率半导体器件可以包括：n漂移部分; 设置在所述n漂移部的上部的栅极; 设置成与门接触的有源部分; 发射极部，设置在所述有源部中并被设置成与所述栅极接触; 设置成与所述有源部分间隔开的非活性部分; 设置在非活动部分中的浮动部分; 以及设置成围绕不活动部分的虚拟门，以便防止活动部分和非活动部分之间的穿孔。
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公开(公告)号：US20160013268A1
公开(公告)日：2016-01-14
申请号：US14617158
申请日：2015-02-09
发明人： Kyu Hyun MO , Dong Soo SEO , Chang Su JANG , Jae Hoon PARK , In Hyuk SONG
IPC分类号： H01L29/06 , H01L29/423 , H01L29/78
CPC分类号： H01L29/0634 , H01L29/0865 , H01L29/1095 , H01L29/42356 , H01L29/7397 , H01L29/7813 , H01L29/7827
摘要： A power semiconductor device may include a first conductivity type semiconductor substrate, a super-junction portion disposed on the first conductivity type semiconductor substrate and including a first conductivity type pillar and a second conductivity type pillar arranged in an alternating manner, and a three-dimensional (3D) gate portion disposed on the first conductivity type pillar. The 3D gate portion is disposed on the first conductivity type pillar to reduce the widths of the first and second conductivity type pillars, thereby effectively reducing a device size.
摘要翻译： 功率半导体器件可以包括第一导电类型半导体衬底，设置在第一导电类型半导体衬底上的超接合部分，并且包括交替排列的第一导电型柱和第二导电型柱，并且三维 （3D）门部分，设置在第一导电型柱上。 3D栅极部分设置在第一导电型柱上以减小第一和第二导电型柱的宽度，从而有效地减小了器件尺寸。
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公开(公告)号：US20150179826A1
公开(公告)日：2015-06-25
申请号：US14274084
申请日：2014-05-09
发明人： Chang Su JANG , Yoon Seong KIM , Kyu Hyun MO , Dong Soo SEO , Jae Kyu SUNG
IPC分类号： H01L29/872 , H01L29/66
CPC分类号： H01L29/66143 , H01L29/0619 , H01L29/872
摘要： A diode device may include: a first semiconductor area having a first conductivity type; a second semiconductor area having a second conductivity type, provided on the first semiconductor area and having a uniform impurity density; a trench provided to pass through the second semiconductor area to contact the first semiconductor area; and a first metal layer provided on surfaces of the trench and the second semiconductor area.
摘要翻译： 二极管器件可以包括：具有第一导电类型的第一半导体区域; 具有第二导电类型的第二半导体区域，设置在第一半导体区域上并具有均匀的杂质密度; 设置成通过所述第二半导体区域以与所述第一半导体区域接触的沟槽; 以及设置在所述沟槽和所述第二半导体区域的表面上的第一金属层。
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公开(公告)号：US20150171198A1
公开(公告)日：2015-06-18
申请号：US14271244
申请日：2014-05-06
发明人： In Hyuk SONG , Kee Ju UM , Chang Su JANG , Jae Hoon PARK , Dong Soo SEO
IPC分类号： H01L29/739 , H01L29/06 , H01L29/10
CPC分类号： H01L29/7397 , H01L29/0615 , H01L29/0619 , H01L29/0878 , H01L29/4236 , H01L29/7811 , H01L29/7813
摘要： A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; a termination region formed in the vicinity of the active region; a plurality of trenches formed in a length direction of the active region; and a hole accumulating region formed in the active region and below the channel and having a first conductivity type. A trench disposed at a boundary between the termination region and the active region has a depth shallower than that of a trench adjacent thereto.
摘要翻译： 功率半导体器件可以包括：在功率半导体器件的导通操作时具有流过其中形成的沟道的电流的有源区; 形成在有源区附近的端接区域; 在所述有源区的长度方向上形成的多个沟槽; 以及形成在所述有源区域中并且在所述沟道下方并具有第一导电类型的孔积聚区域。 设置在终端区域和有源区域之间的边界处的沟槽的深度比与其相邻的沟槽的深度浅。
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公开(公告)号：US20140291722A1
公开(公告)日：2014-10-02
申请号：US13937589
申请日：2013-07-09
发明人： Dong Soo SEO , Jaehoon PARK , Kee Ju UM , Chang Su JANG , In Hyuk SONG
IPC分类号： H01L29/739 , H01L29/66
CPC分类号： H01L29/7395 , H01L29/0696 , H01L29/1095 , H01L29/513 , H01L29/518 , H01L29/66348 , H01L29/7397
摘要： There is provided a power semiconductor device, including a plurality of trench gates formed to be spaced apart from each other by a predetermined distance, a current increasing part formed between the trench gates and including a first conductivity-type emitter layer and a gate oxide formed on a surface of the trench gate, and an immunity improving part formed between the trench gates and including a second conductivity-type body layer, a preventing film formed on the surface of the trench gate, and a gate oxide having a thickness less than that the gate oxide of the current increasing part.
摘要翻译： 提供了一种功率半导体器件，包括形成为彼此间隔开预定距离的多个沟槽栅极，形成在沟槽栅极之间并包括第一导电型发射极层和形成的栅极氧化物的电流增加部分 在所述沟槽栅极的表面上形成的抗扰度改善部以及形成在所述沟槽栅极之间并且包括第二导电型体层的抗扰度改善部，以及形成在所述沟槽栅极的表面上的防止膜和厚度小于所述沟槽栅极的厚度的栅极氧化物。 电流增加部分的栅极氧化物。
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