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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210320077A1

    公开(公告)日：2021-10-14

    申请号：US17108140

    申请日：2020-12-01

    申请人： Samsung Electronics Co., Ltd.

    发明人： JUBIN SEO ,  SUJEONG PARK ,  KWANGJIN MOON ,  MYUNGJOO PARK

    IPC分类号： H01L23/00

    摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, an under-bump pattern on the semiconductor substrate and including a first metal, a bump pattern on the under-bump pattern, and an organic dielectric layer on the semiconductor substrate and in contact with a sidewall of the bump pattern. The bump pattern includes a support pattern in contact with the under-bump pattern and having a first width, and a solder pillar pattern on the support pattern and having a second width. The first width is greater than the second width. The support pattern includes at least one of a solder material and an intermetallic compound (IMC). The intermetallic compound includes the first metal and the solder material.

    SEMICONDUCTOR DEVICES INCLUDING THROUGH VIAS AND METHODS OF FABRICATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICES INCLUDING THROUGH VIAS AND METHODS OF FABRICATING THE SAME 有权

    公开(公告)号：US20220199469A1

    公开(公告)日：2022-06-23

    申请号：US17691178

    申请日：2022-03-10

    申请人： Samsung Electronics Co., Ltd.

    发明人： YI KOAN HONG ,  TAESEONG KIM ,  KWANGJIN MOON

    IPC分类号： H01L21/768 ,  H01L21/02

    摘要： Disclosed are semiconductor devices including through vias and methods of fabricating the same. The methods may include forming a first structure including a metal pattern and a second structure on the first structure. The metal pattern includes an upper surface facing the second structure. The methods may also include etching the second structure to form a via hole exposing the metal pattern, oxidizing a first etch residue in the via hole to convert the first etch residue into an oxidized first etch residue, and removing the oxidized first etch residue. After removing the oxidized first etch residue, the upper surface of the metal pattern may include a first portion that includes a recess and has a first surface roughness and a second portion that is different from the first portion and has a second surface roughness. The first surface roughness may be greater than the second surface roughness.

    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE
    4.
    发明申请
    SEMICONDUCTOR DEVICE AND SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220037236A1

    公开(公告)日：2022-02-03

    申请号：US17316970

    申请日：2021-05-11

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： JUBIN SEO ,  KWANGJIN MOON ,  KUNSANG PARK ,  MYUNGJOO PARK ,  SUJEONG PARK ,  JAEWON HWANG

    IPC分类号： H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065 ,  H01L23/522 ,  H01L23/532 ,  H01L23/528

    摘要： A semiconductor device includes a semiconductor substrate having a first surface and a second surface, which are opposite to each other, an active pattern protruding from the first surface of the semiconductor substrate, the active pattern including a source/drain region, a power rail electrically connected to the source/drain region, a power delivery network disposed on the second surface of the semiconductor substrate, and a penetration via structure penetrating the semiconductor substrate and electrically connected to the power rail and the power delivery network. The penetration via structure includes a first conductive pattern electrically connected to the power rail and a second conductive pattern electrically connected to the power delivery network. The first conductive pattern includes a material different from the second conductive pattern.

    SEMICONDUCTOR DEVICE INCLUDING THROUGH SUBSTRATE VIAS AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING THROUGH SUBSTRATE VIAS AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210351112A1

    公开(公告)日：2021-11-11

    申请号：US17381287

    申请日：2021-07-21

    申请人： Samsung Electronics Co., Ltd.

    发明人： MYUNGJOO PARK ,  JAEWON HWANG ,  KWANGJIN MOON ,  KUNSANG PARK

    IPC分类号： H01L23/48 ,  H01L23/538 ,  H01L21/48 ,  H01L23/00

    摘要： A semiconductor device and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes a substrate, a first through substrate via configured to penetrate at least partially through the substrate, the first through substrate via having a first aspect ratio, and a second through substrate via configured to penetrate at least partially through the substrate. The second through substrate via has a second aspect ratio greater than the first aspect ratio, and each of the first through substrate via and the second through substrate via includes a first conductive layer and a second conductive layer. A thickness in a vertical direction of the first conductive layer of the first through substrate via is less than a thickness in the vertical direction of the first conductive layer of the second through substrate via.

    SEMICONDUCTOR DEVICES INCLUDING THROUGH VIAS AND METHODS OF FABRICATING THE SAME
    7.
    发明申请
    SEMICONDUCTOR DEVICES INCLUDING THROUGH VIAS AND METHODS OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20200381301A1

    公开(公告)日：2020-12-03

    申请号：US16734456

    申请日：2020-01-06

    申请人： Samsung Electronics Co., Ltd.

    发明人： YI KOAN HONG ,  TAESEONG KIM ,  KWANGJIN MOON

    IPC分类号： H01L21/768 ,  H01L21/02

    摘要： Disclosed are semiconductor devices including through vias and methods of fabricating the same. The methods may include forming a first structure including a metal pattern and a second structure on the first structure. The metal pattern includes an upper surface facing the second structure. The methods may also include etching the second structure to form a via hole exposing the metal pattern, oxidizing a first etch residue in the via hole to convert the first etch residue into an oxidized first etch residue, and removing the oxidized first etch residue. After removing the oxidized first etch residue, the upper surface of the metal pattern may include a first portion that includes a recess and has a first surface roughness and a second portion that is different from the first portion and has a second surface roughness. The first surface roughness may be greater than the second surface roughness.