Abstract:
A bit flip count is determined for each bin in a plurality of bins, including by: (1) performing a first read on a group of solid state storage cells at a first threshold that corresponds to a lower bound for a given bin and (2) performing a second read on the group of solid state storage cells at a second threshold that corresponds to an upper bound for the given bin. A minimum is determined using the bit flip counts corresponding to the plurality of bins and the minimum is used to estimate an optimal threshold.
Abstract:
An address is received. One or more neighbors associated with the received address is/are determined. One or more neighboring hot metrics is/are determined for the one or more neighbors associated with the received address. A hot metric for the received address is determined based at least in part on the neighboring hot metrics.
Abstract:
An instruction to write data to a write logical address is received where the write logical address is a member of a group of one or more logical addresses. It is determined if data associated with any of the logical addresses in the group of logical addresses has been written to any of a plurality of open groups of locations. If so, the data is written to the open group of locations to which data from the group of logical addresses has already been written to. If not, an open group of locations to write to is selected from the plurality of open groups of locations.
Abstract:
Miscorrection detection for error correction codes using bit reliabilities includes receiving a plurality of reliabilities corresponding to respective ones of a plurality of read values, receiving one or more proposed corrections corresponding to one or more of the plurality of read values, and determining a miscorrection metric based at least in part on one or more of the plurality of reliabilities corresponding to the one or more of the plurality of read values.
Abstract:
A type of data relocation to perform on a group of solid state storage cells is selected from a group that includes garbage collection and wear leveling. Source blocks in the group of solid state storage cells are identified using the selected type of data relocation. The source blocks are read in order to obtain relocated data and the relocated data is stored in an open block in the group of solid state storage cells. Relocated data associated with the selected type of data relocation is stored in the open block and relocated data associated with the unselected type of data relocation is excluded from the open block.
Abstract:
Decoding using miscorrection detection is disclosed. A measure indicative of the number of proposed corrections included in a set of proposed corrections corresponding to one or more of a plurality of read values is received. The plurality of read values corresponds to a codeword. It is determined whether the number of proposed corrections is a permitted number of corrections.
Abstract:
Decoding an LDPC encoded codeword is disclosed. Variable nodes corresponding to a parity check matrix of the LDPC encoded codeword have been divided into a plurality of groups. A selected group of variable nodes from the plurality of groups of variable nodes is updated. Check nodes are updated using a min-sum update. A selected input value provided from a variable node of the selected group of variable nodes and provided to a certain check node of the check nodes is discarded to be not available for use in a future min-sum update.
Abstract:
It is determined that a read count has reached one of a set of read count thresholds. An initial test page which corresponds to the read count threshold that has been reached is selected from a set of initial test pages. There is at least one page that is not in the set of initial test pages and is victimized by an offending page that also victimizes a page in the set of initial test pages. A test read is performed on the selected test page and the results of the test read of the selected test page are evaluated for read disturb noise.
Abstract:
A hinge path is used to determine if a first possible root is a root of an error location polynomial. A positive limb path is used to determine if a second possible root is a root of the error location polynomial, including by using a sequence of coefficients associated with the error location polynomial. The sequence of coefficients is reversed and a negative limb path is used to determine if a third possible root is a root of the error location polynomial, including by using the reversed sequence of coefficients, wherein the negative limb path is a copy of the positive limb path.
Abstract:
A set of one or more component syndromes associated with a turbo product code (TPC) codeword is obtained from a component syndrome buffer. Component decoding is performed on the set of one or more component syndromes.