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公开(公告)号：US12147700B2
公开(公告)日：2024-11-19
申请号：US17944862
申请日：2022-09-14
Applicant: SK hynix Inc.
Inventor： Haobo Wang , Meysam Asadi , Fan Zhang
IPC: G06F3/06
Abstract: A memory system or a method for estimating channel information to be used for error decoding. The memory system or the method a) performs one or more read operations on a page selected from among the plurality of pages using a target read threshold, b) obtains the target read threshold, a historical read threshold voltage set associated with failed read operations of the selected page, checksum values, and asymmetric ratios of ones count and zeros count which are associated with the historical read threshold voltage set, c) provides the obtained target read threshold, historical read threshold voltage set, checksum values and asymmetric ratios as input information to a neural network, and d) predicts, by the neural network, channel information at the target read threshold based on the input information and a set activation function.
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公开(公告)号：US12124330B2
公开(公告)日：2024-10-22
申请号：US18175843
申请日：2023-02-28
Applicant: SK hynix Inc.
Inventor： Fan Zhang , Meysam Asadi
CPC classification number: G06F11/1068 , G06F11/076 , G06F11/0793
Abstract: A memory system having a memory block and a memory controller in communication with the memory block. The memory controller is configured to: read and decode codewords from the memory block, determine a fail bit count (FBC), a strong correct (SC) rate indicating a percentage of failed bits correctable through log likelihood ratios (LLRs), and a number of spare bytes in the codewords decoded from the memory, predict a soft decoding error based on a fixed FBC, a fixed SC rate, and the number of spare bytes, and determine soft errors in the codewords read from the memory block based on the predicted soft decoding error.
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公开(公告)号：US12038809B1
公开(公告)日：2024-07-16
申请号：US18179235
申请日：2023-03-06
Applicant: SK hynix Inc.
Inventor： Fan Zhang , Shiangjyh Steve Chang
CPC classification number: G06F11/1076 , H03M13/1102
Abstract: When stored data is retrieved from a memory using a given logical address, an initial checksum is computed over the data, and an error correction decoding can be performed to generate a decoded data payload. The decoded data payload may include decoded data and a decoded logical address. An uncorrectable error failure analysis can be performed based on the initial checksum, the error correction decoder status, and the decoded logical address to determine which error type has occurred from a plurality of error types.
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4.发明授权
公开(公告)号：US11854629B2
公开(公告)日：2023-12-26
申请号：US17532905
申请日：2021-11-22
Applicant: SK hynix Inc.
Inventor： Fan Zhang , Aman Bhatia , Haobo Wang
CPC classification number: G11C16/3404 , G06F18/214 , G06N3/063 , G11C16/102 , G11C16/14 , G11C16/26
Abstract: A scheme for non-parametric optimal read threshold estimation of a memory system. The memory system includes a memory device including pages and a controller including a neural network. The controller performs read operations on a selected page using a read threshold set; obtain the read threshold set, a checksum value and an asymmetric ratio of ones count and zeros count which are associated with decoding of the selected page according to each of the read operations; provide the obtained read threshold set, the checksum value and the asymmetric ratio as input information to the neural network; and estimate, by the neural network, an optimal read threshold voltage based on the input information and weights including a combination of multiple matrices and bias vectors.
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公开(公告)号：US11769556B2
公开(公告)日：2023-09-26
申请号：US17443755
申请日：2021-07-27
Applicant: SK hynix Inc.
Inventor： Haobo Wang , Aman Bhatia , Fan Zhang
CPC classification number: G11C16/3409 , G11C11/54 , G11C16/102 , G11C16/12 , G11C16/26
Abstract: Embodiments provide a scheme for estimating an optimal read threshold voltage using a deep neural network (DNN) with a reduced number of processing. A controller includes a combined neural network, which receives first and second cumulative distribution function (CDF) values, each CDF value corresponding to a program voltage (PV) level associated with a read operation on the cells. The combined neural network generates first and second connection vectors based on the first and second CDF values and first weight values, and estimates an optimal read threshold voltage based on the first and second connection vectors and second weight values.
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公开(公告)号：US11769555B2
公开(公告)日：2023-09-26
申请号：US17443726
申请日：2021-07-27
Applicant: SK hynix Inc.
Inventor： Haobo Wang , Aman Bhatia , Fan Zhang
CPC classification number: G11C16/3404 , G06N3/08 , G11C16/102 , G11C16/26 , G06F7/5443
Abstract: Embodiments provide a scheme for estimating an optimal read threshold voltage using a deep neural network (DNN) with reduced number of processing. A controller receives first and second program voltage (PV) levels associated with read operations on cells. The controller estimates first and second probability distribution parameter sets representing skew normal distributions of the first and second PV levels, respectively. The controller estimates an optimal read threshold voltage based on the first and second probability distribution parameter sets. The optimal read threshold voltage is a read threshold voltage such that first probability density function (PDF) value of the skew normal distribution of the first PV level is the same as the second PDF value of the skew normal distribution of the second PV level.
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公开(公告)号：US11610641B2
公开(公告)日：2023-03-21
申请号：US16925158
申请日：2020-07-09
Applicant: SK hynix Inc.
Inventor： Aman Bhatia , Fan Zhang
Abstract: A non-volatile data storage device includes memory cells arranged in a plurality of blocks and a memory controller coupled to the memory cells for controlling operations of the memory cells. The memory controller is configured to determine if a given block is a bad m-bit multi-level block. In an m-bit multi-level block, each memory cell is an m-bit multi-level cell (MLC), m being an integer equal to or greater than 2. Upon determining that the given block is a good m-bit multi-level block, the memory controller assigns the given block to be an m-bit multi-level user block. Upon determining that the given block is a bad m-bit multi-level block, the memory controller determines if the given block is a good n-bit block. In an n-bit block, each memory cell is an n-bit cell, n being an integer less than m. Upon determining that the given block is a good n-bit block, the memory controller assigns the given block to be an n-bit user block or an n-bit write-buffer block.
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公开(公告)号：US11515897B2
公开(公告)日：2022-11-29
申请号：US16988026
申请日：2020-08-07
Applicant: SK hynix Inc.
Inventor： Kyoung Lae Cho , Soo Jin Kim , Naveen Kumar , Aman Bhatia , Yi-Min Lin , Chenrong Xiong , Fan Zhang , Yu Cai , Abhiram Prabahkar
Abstract: A data processing system includes a storage medium, and a controller including a data processing block, configured to receive data from a host, transmit the received data to the storage medium, read data from the storage medium in response to a read request from the host, and decode the read data by the data processing block according to multiple decoding modes. The data processing block includes a first decoder and a second decoder, and is configured to manage the first decoder and the second decoder to run the decoding for the read data, and activate a fast decoding having shorter latency than a normal decoding after a fast decoding condition is satisfied.
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9.发明授权
公开(公告)号：US11514999B2
公开(公告)日：2022-11-29
申请号：US17233167
申请日：2021-04-16
Applicant: SK hynix Inc.
Inventor： Fan Zhang , Aman Bhatia
Abstract: Embodiments provide a scheme for parametric PV-level modeling and an optimal read threshold voltage estimation in a memory system. A controller performs read operations on cells using read threshold voltages; generates CMF samples based on the read operations; and receives first and second CDF values, which correspond to CMF samples, each CDF value representing a skew normal distribution. The controller estimates first and second probability distribution parameter sets corresponding to the first and second CDF values, respectively; determines first and second PDF values using the first and second probability distribution parameter sets, respectively; and estimates, as an optimal read threshold voltage, a read threshold voltage corresponding to a cross-point of the first and second PDF values.
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公开(公告)号：US11444637B2
公开(公告)日：2022-09-13
申请号：US16566639
申请日：2019-09-10
Applicant: SK hynix Inc.
Inventor： Fan Zhang , Chenrong Xiong , Xuanxuan Lu
Abstract: Disclosed are methods, systems and devices for decoding data read from a memory device, including receiving noisy data from a first memory location included in a word line zone of the memory device, identifying the word line zone and a prior successful decoder parameter associated with the word line zone, decoding the noisy data using the prior successful decoder parameter used in a prior successful decoding with respect to a second memory location included in the same word line zone, determining whether the decoding based on the prior successful decoder parameter has succeeded, maintaining, upon a determination that the decoding has succeeded, the prior successful decoder parameter as a decoder parameter for the first memory location, and decoding, upon a determination that the decoding operation has failed, the noisy data read from the first memory location by using another decoder parameter selected from a set of predefined decoder parameters.
