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公开(公告)号：US20230056780A1
公开(公告)日：2023-02-23
申请号：US17445330
申请日：2021-08-18
发明人： Jian Zuo , Yaojian Lin
IPC分类号： H01L23/00
摘要： A semiconductor device has a semiconductor die. A first contact pad, second contact pad, and third contact pad are formed over the semiconductor die. An under-bump metallization layer (UBM) is formed over the first contact pad, second contact pad, and third contact pad. The UBM electrically connects the first contact pad to the second contact pad. The third contact pad is electrically isolated from the UBM. Conductive traces can be formed extending between the first contact pad and second contact pad under the UBM. A fourth contact pad can be formed over the first contact pad and a fifth contact pad can be formed over the second contact pad. The UBM is then formed over the fourth and fifth contact pads.
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公开(公告)号：US11488932B2
公开(公告)日：2022-11-01
申请号：US16827363
申请日：2020-03-23
发明人： Byung Joon Han , Il Kwon Shim , Yaojian Lin , Pandi C. Marimuthu
摘要： A semiconductor device includes a standardized carrier. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. The semiconductor wafer is singulated through a first portion of the base semiconductor material to separate the semiconductor die. The semiconductor die are disposed over the standardized carrier. A size of the standardized carrier is independent from a size of the semiconductor die. An encapsulant is deposited over the standardized carrier and around the semiconductor die. An interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The semiconductor device is singulated through the encapsulant. Encapsulant remains disposed on a side of the semiconductor die. Alternatively, the semiconductor device is singulated through a second portion of the base semiconductor and through the encapsulant to remove the second portion of the base semiconductor and encapsulant from the side of the semiconductor die.
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公开(公告)号：US11319207B2
公开(公告)日：2022-05-03
申请号：US16912902
申请日：2020-06-26
发明人： Yaojian Lin , Il Kwon Shim
摘要： A microelectromechanical system (MEMS) semiconductor device has a first and second semiconductor die. A first semiconductor die is embedded within an encapsulant together with a modular interconnect unit. Alternatively, the first semiconductor die is embedded within a substrate. A second semiconductor die, such as a MEMS die, is disposed over the first semiconductor die and electrically connected to the first semiconductor die through an interconnect structure. In another embodiment, the first semiconductor die is flip chip mounted to the substrate, and the second semiconductor die is wire bonded to the substrate adjacent to the first semiconductor die. In another embodiment, first and second semiconductor die are embedded in an encapsulant and are electrically connected through a build-up interconnect structure. A lid is disposed over the semiconductor die. In a MEMS microphone embodiment, the lid, substrate, or interconnect structure includes an opening over a surface of the MEMS die.
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公开(公告)号：US11127666B2
公开(公告)日：2021-09-21
申请号：US15428007
申请日：2017-02-08
发明人： Yaojian Lin , Kang Chen , Jianmin Fang
IPC分类号： H01L23/498 , H01L21/56 , H01L23/00 , H01L23/538 , H01L21/48 , H01L23/31
摘要： A semiconductor device has a semiconductor die mounted to a carrier. An encapsulant is deposited over the semiconductor die and carrier. The carrier is removed. A first insulating layer is formed over a portion of the encapsulant within an interconnect site outside a footprint of the semiconductor die. An opening is formed through the first insulating layer within the interconnect site to expose the encapsulant. The opening can be ring-shaped or vias around the interconnect site and within a central region of the interconnect site to expose the encapsulant. A first conductive layer is formed over the first insulating layer to follow a contour of the first insulating layer. A second conductive layer is formed over the first conductive layer and exposed encapsulant. A second insulating layer is formed over the second conductive layer. A bump is formed over the second conductive layer in the interconnect site.
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公开(公告)号：US11024585B2
公开(公告)日：2021-06-01
申请号：US16005348
申请日：2018-06-11
发明人： Byung Joon Han , Il Kwon Shim , KyoungHee Park , Yaojian Lin , KyoWang Koo , In Sang Yoon , SeungYong Chai , SungWon Cho , SungSoo Kim , Hun Teak Lee , DeokKyung Yang
IPC分类号： H01L23/552 , H01L23/498 , H01L21/48 , H01L21/683 , H01L23/00 , H01L23/31 , H01L25/16 , H01L21/56
摘要： An integrated circuit packaging system and method of manufacture thereof includes: a substrate with internal circuitry between a substrate top side, a substrate bottom side, and vertical sides; an integrated circuit coupled to the internal circuitry; a molded package body formed directly on the integrated circuit and the substrate top side of the substrate; and a conductive conformal shield structure applied directly on the molded package body, the vertical sides, and to extend below the substrate bottom side coupled to the internal circuitry.
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公开(公告)号：US20200335478A1
公开(公告)日：2020-10-22
申请号：US16918281
申请日：2020-07-01
发明人： Yaojian Lin , Pandi C. Marimuthu , Il Kwon Shim , Byung Joon Han
IPC分类号： H01L23/00 , H01L23/31 , H01L21/56 , H01L21/786 , H01L21/784 , H01L21/782 , H01L21/82 , H01L21/78
摘要： A semiconductor device includes a semiconductor die and an encapsulant deposited over and around the semiconductor die. A semiconductor wafer includes a plurality of semiconductor die and a base semiconductor material. A groove is formed in the base semiconductor material. The semiconductor wafer is singulated through the groove to separate the semiconductor die. The semiconductor die are disposed over a carrier with a distance of 500 micrometers (μm) or less between semiconductor die. The encapsulant covers a sidewall of the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while the encapsulant remains devoid of the fan-in interconnect structure. A portion of the encapsulant is removed from a non-active surface of the semiconductor die. The device is singulated through the encapsulant while leaving encapsulant disposed covering a sidewall of the semiconductor die. The encapsulant covering the sidewall includes a thickness of 50 μm or less.
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公开(公告)号：US20200325014A1
公开(公告)日：2020-10-15
申请号：US16912902
申请日：2020-06-26
发明人： Yaojian Lin , Il Kwon Shim
IPC分类号： B81B7/00
摘要： A microelectromechanical system (MEMS) semiconductor device has a first and second semiconductor die. A first semiconductor die is embedded within an encapsulant together with a modular interconnect unit. Alternatively, the first semiconductor die is embedded within a substrate. A second semiconductor die, such as a MEMS die, is disposed over the first semiconductor die and electrically connected to the first semiconductor die through an interconnect structure. In another embodiment, the first semiconductor die is flip chip mounted to the substrate, and the second semiconductor die is wire bonded to the substrate adjacent to the first semiconductor die. In another embodiment, first and second semiconductor die are embedded in an encapsulant and are electrically connected through a build-up interconnect structure. A lid is disposed over the semiconductor die. In a MEMS microphone embodiment, the lid, substrate, or interconnect structure includes an opening over a surface of the MEMS die.
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公开(公告)号：US20200219832A1
公开(公告)日：2020-07-09
申请号：US16826216
申请日：2020-03-21
IPC分类号： H01L23/66 , H01L21/48 , H01L23/498 , H01L21/56 , H01L23/522 , H01L23/528 , H01L23/00 , H01L23/538 , H01L23/552 , H01L21/683
摘要： A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.
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公开(公告)号：US10662056B2
公开(公告)日：2020-05-26
申请号：US16169817
申请日：2018-10-24
发明人： Yaojian Lin , Won Kyoung Choi , Kang Chen , Ivan Micallef
IPC分类号： B81B7/00 , B81C1/00 , H01L21/56 , H01L23/538 , H01L23/552 , H01L23/00 , H01L25/10 , H01L25/00
摘要： A semiconductor device has a first semiconductor die and a modular interconnect structure adjacent to the first semiconductor die. An encapsulant is deposited over the first semiconductor die and modular interconnect structure as a reconstituted panel. An interconnect structure is formed over the first semiconductor die and modular interconnect structure. An active area of the first semiconductor die remains devoid of the interconnect structure. A second semiconductor die is mounted over the first semiconductor die with an active surface of the second semiconductor die oriented toward an active surface of the first semiconductor die. The reconstituted panel is singulated before or after mounting the second semiconductor die. The first or second semiconductor die includes a microelectromechanical system (MEMS). The second semiconductor die includes an encapsulant and an interconnect structure formed over the second semiconductor die. Alternatively, the second semiconductor die is mounted to an interposer disposed over the interconnect structure.
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10.发明授权公开(公告)号：US10446459B2
公开(公告)日：2019-10-15
申请号：US15618343
申请日：2017-06-09
摘要： A semiconductor device has a semiconductor die and an encapsulant around the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The fan-in interconnect structure includes an insulating layer and a conductive layer formed over the semiconductor die. The conductive layer remains within a footprint of the semiconductor die. A portion of encapsulant is removed from over the semiconductor die. A backside protection layer is formed over a non-active surface of the semiconductor die after depositing the encapsulant. The backside protection layer is formed by screen printing or lamination. The backside protection layer includes an opaque, transparent, or translucent material. The backside protection layer is marked for alignment using a laser. A reconstituted panel including the semiconductor die is singulated through the encapsulant to leave encapsulant disposed over a sidewall of the semiconductor die.
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