公开(公告)号：US20030134481A1

公开(公告)日：2003-07-17

申请号：US10350403

申请日：2003-01-23

Applicant: STMicroelectronics S.r.I.

Inventor： Piero Fallica

IPC: H01L021/331 ,  H01L031/0392

CPC classification number: H01L27/1203 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/0623 ,  H01L27/0688 ,  H01L27/12 ,  H01L2924/00011 ,  H01L2224/80001

Abstract: Integrated circuit including a power component with vertical current flow and at least one low or medium voltage component, the at least one low or medium voltage component formed in a first semiconductor layer separated from a second semiconductor layer by an insulating material layer. The power component with vertical current flow is formed in the second semiconductor layer, and excavations are formed in the insulating material layer which extend from a free surface of the first semiconductor layer to the second semiconductor layer, said excavations having lateral walls of insulating material and being filled up with a conductor material in order to electrically contact active regions of the power component in the second semiconductor layer by electrodes placed on the free surface of the first semiconductor layer.

Abstract translation: 集成电路包括具有垂直电流的功率分量和至少一个低或中等电压分量，所述至少一个低或中等电压分量形成在通过绝缘材料层与第二半导体层分离的第一半导体层中。 具有垂直电流的功率部件形成在第二半导体层中，并且在从第一半导体层的自由表面延伸到第二半导体层的绝缘材料层中形成挖掘，所述挖掘具有绝缘材料的侧壁， 被填充有导体材料，以便通过放置在第一半导体层的自由表面上的电极与第二半导体层中的功率部件的有源区域电接触。