Device for storage of multiport data, particularly for an arithmetic and logic unit of a digital signal processing processor
    1.
    发明申请
    Device for storage of multiport data, particularly for an arithmetic and logic unit of a digital signal processing processor 有权
    用于存储多端口数据的装置,特别是用于数字信号处理处理器的算术和逻辑单元

    公开(公告)号:US20040057321A1

    公开(公告)日:2004-03-25

    申请号:US10611323

    申请日:2003-07-01

    Inventor: Helene Esch

    CPC classification number: G11C8/16

    Abstract: The data storage device includes several registers that can be addressed by address words, and connected to p output ports through connections that can be configured in response to address words of p registers selected to read the contents of these registers on the p ports respectively. All register address words contain a specific bit with a predetermined rank identical for all address words and remaining bits. The registers are connected in pairs on each output port, each pair of registers containing two registers with address words that only differ in the value of the said specific bit. The connections include a pair of first switches that can be controlled in a complementary manner by the specific bit in the address word of one of the two registers, and a second switch connected to the output port considered and that can be controlled from the remaining bits of the address words of the two registers, for each pair of registers and for each output port, the first two switches are connected firstly between the corresponding two registers, and secondly between the corresponding second switch.

    Abstract translation: 数据存储装置包括几个可由地址字寻址的寄存器,并通过可以配置为响应于p个寄存器的地址字被配置以读取p端口上的这些寄存器的内容的连接而连接到p个输出端口。 所有寄存器地址字包含具有与所有地址字和剩余位相同的预定秩的特定位。 寄存器在每个输出端口成对连接,每对寄存器包含两个寄存器,地址字仅在所述特定位的值上不同。 连接包括一对第一开关,其可以通过两个寄存器之一的地址字中的特定位以互补方式进行控制,第二开关连接到所考虑的输出端口,并且可以从剩余位 的两个寄存器的地址字,对于每对寄存器和每个输出端口,前两个开关首先连接在相应的两个寄存器之间,其次在相应的第二个开关之间连接。

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